derek.holloway
7502bf64a4
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69 lines
1.2 KiB
ArmAsm
69 lines
1.2 KiB
ArmAsm
# RUN: llvm-mc -filetype=obj -triple x86_64 --x86-align-branch-boundary=32 --x86-align-branch=jmp %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
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# Exercise cases where we're enabling interrupts with one instruction delay
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# and thus can't add a nop in between without changing behavior.
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.text
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# CHECK: 1e: sti
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# CHECK: 1f: jmp
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.p2align 5
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.rept 30
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int3
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.endr
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sti
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jmp baz
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# CHECK: 5c: movq %rax, %ss
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# CHECK: 5f: jmp
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.p2align 5
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.rept 28
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int3
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.endr
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movq %rax, %ss
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jmp baz
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# CHECK: 9d: movl %esi, %ss
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# CHECK: 9f: jmp
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.p2align 5
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.rept 29
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int3
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.endr
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movl %esi, %ss
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jmp baz
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# movw and movl are interchangeable since we're only using the low 16 bits.
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# Both are generated as "MOV Sreg,r/m16**" (8E /r), but disassembled as movl
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# CHECK: dd: movl %esi, %ss
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# CHECK: df: jmp
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.p2align 5
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.rept 29
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int3
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.endr
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movw %si, %ss
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jmp baz
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# CHECK: 11b: movw (%esi), %ss
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# CHECK: 11e: jmp
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.p2align 5
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.rept 27
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int3
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.endr
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movw (%esi), %ss
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jmp baz
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# CHECK: 15b: movw (%rsi), %ss
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# CHECK: 15d: jmp
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.p2align 5
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.rept 27
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int3
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.endr
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movw (%rsi), %ss
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jmp baz
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int3
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.section ".text.other"
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bar:
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retq
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