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71 lines
6.3 KiB
ArmAsm
71 lines
6.3 KiB
ArmAsm
// REQUIRES: asserts
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// RUN: llvm-mc -triple x86_64-unknown-unknown -debug-only=asm-matcher %s 2>&1 | FileCheck %s
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// CHECK: AsmMatcher: found 4 encodings with mnemonic 'pshufb'
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// CHECK: Trying to match opcode MMX_PSHUFBrr
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Trying to match opcode PSHUFBrr
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Trying to match opcode PSHUFBrm
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// CHECK: Matching formal operand class MCK_Mem128 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 2 encodings with mnemonic 'sha1rnds4'
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// CHECK: Trying to match opcode SHA1RNDS4rri
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// CHECK: Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:1): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 3 (Reg:xmm2): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 4 encodings with mnemonic 'pinsrw'
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// CHECK: Trying to match opcode MMX_PINSRWrr
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// CHECK: Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:3): match success using generic matcher
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// CHECK: Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (Reg:ecx): match success using generic matcher
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 3 (Reg:xmm5): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Trying to match opcode PINSRWrr
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// CHECK: Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:3): match success using generic matcher
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// CHECK: Matching formal operand class MCK_GR32orGR64 against actual operand at index 2 (Reg:ecx): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 3 (Reg:xmm5): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 4 encodings with mnemonic 'crc32l'
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// CHECK: Trying to match opcode CRC32r32r32
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// CHECK: Matching formal operand class MCK_GR32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rbx,IndexReg=rcx,Scale=8,Disp=2125315823,SegReg=gs): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Trying to match opcode CRC32r32m32
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// CHECK: Matching formal operand class MCK_Mem32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rbx,IndexReg=rcx,Scale=8,Disp=2125315823,SegReg=gs): match success using generic matcher
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// CHECK: Matching formal operand class MCK_GR32 against actual operand at index 2 (Reg:ecx): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 2 encodings with mnemonic 'maskmovdqu'
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// CHECK: Trying to match opcode MASKMOVDQU64
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 1 (Reg:xmm0): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 2 encodings with mnemonic 'vmaskmovdqu'
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// CHECK: Trying to match opcode VMASKMOVDQU64
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 1 (Reg:xmm0): match success using generic matcher
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// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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// CHECK: AsmMatcher: found 4 encodings with mnemonic 'punpcklbw'
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// CHECK: Trying to match opcode MMX_PUNPCKLBWrr
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (Reg:mm0): match success using generic matcher
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 2 (Memory: ModeSize=64,Size=32,BaseReg=rsp,Scale=1): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Trying to match opcode MMX_PUNPCKLBWrm
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (Reg:mm0): match success using generic matcher
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// CHECK: Matching formal operand class MCK_Mem32 against actual operand at index 2 (Memory: ModeSize=64,Size=32,BaseReg=rsp,Scale=1): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
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pshufb CPI1_0(%rip), %xmm1
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sha1rnds4 $1, %xmm1, %xmm2
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pinsrw $3, %ecx, %xmm5
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crc32l %gs:0x7eadbeef(%rbx,%rcx,8),%ecx
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maskmovdqu %xmm0, %xmm1
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vmaskmovdqu %xmm0, %xmm1
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.intel_syntax
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punpcklbw mm0, dword ptr [rsp]
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