derek.holloway
7502bf64a4
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191 lines
3.9 KiB
ArmAsm
191 lines
3.9 KiB
ArmAsm
# RUN: llvm-mc %s -triple=xtensa -show-encoding --mattr=+debug,+density \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
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.align 4
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LBL0:
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# Instruction format RRR
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# CHECK-INST: break 1, 1
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# CHECK: encoding: [0x10,0x41,0x00]
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break 1, 1
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# Instruction format RRRN
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# CHECK-INST: break.n 1
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# CHECK: encoding: [0x2d,0xf1]
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break.n 1
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# Instruction format RRR
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# CHECK-INST: lddr32.p a3
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# CHECK: encoding: [0xe0,0x73,0x00]
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lddr32.p a3
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# Instruction format RRR
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# CHECK-INST: sddr32.p a3
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# CHECK: encoding: [0xf0,0x73,0x00]
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sddr32.p a3
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#Instruction format RRR
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#CHECK-INST: xsr a2, icount
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#CHECK: encoding: [0x20,0xec,0x61]
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xsr a2,icount
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#Instruction format RRR
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#CHECK-INST: xsr a2, icount
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#CHECK: encoding: [0x20,0xec,0x61]
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xsr.icount a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, icount
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#CHECK: encoding: [0x20,0xec,0x61]
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xsr a2, 236
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#Instruction format RRR
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#CHECK-INST: xsr a2, icountlevel
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#CHECK: encoding: [0x20,0xed,0x61]
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xsr a2,icountlevel
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#Instruction format RRR
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#CHECK-INST: xsr a2, icountlevel
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#CHECK: encoding: [0x20,0xed,0x61]
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xsr.icountlevel a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, icountlevel
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#CHECK: encoding: [0x20,0xed,0x61]
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xsr a2, 237
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka0
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#CHECK: encoding: [0x20,0x80,0x61]
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xsr a2,ibreaka0
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka0
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#CHECK: encoding: [0x20,0x80,0x61]
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xsr.ibreaka0 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka0
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#CHECK: encoding: [0x20,0x80,0x61]
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xsr a2, 128
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka1
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#CHECK: encoding: [0x20,0x81,0x61]
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xsr a2,ibreaka1
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka1
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#CHECK: encoding: [0x20,0x81,0x61]
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xsr.ibreaka1 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreaka1
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#CHECK: encoding: [0x20,0x81,0x61]
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xsr a2, 129
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka0
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#CHECK: encoding: [0x20,0x90,0x61]
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xsr a2,dbreaka0
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka0
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#CHECK: encoding: [0x20,0x90,0x61]
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xsr.dbreaka0 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka0
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#CHECK: encoding: [0x20,0x90,0x61]
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xsr a2, 144
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka1
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#CHECK: encoding: [0x20,0x91,0x61]
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xsr a2,dbreaka1
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka1
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#CHECK: encoding: [0x20,0x91,0x61]
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xsr.dbreaka1 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreaka1
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#CHECK: encoding: [0x20,0x91,0x61]
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xsr a2, 145
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc0
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#CHECK: encoding: [0x20,0xa0,0x61]
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xsr a2,dbreakc0
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc0
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#CHECK: encoding: [0x20,0xa0,0x61]
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xsr.dbreakc0 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc0
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#CHECK: encoding: [0x20,0xa0,0x61]
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xsr a2, 160
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc1
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#CHECK: encoding: [0x20,0xa1,0x61]
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xsr a2,dbreakc1
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc1
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#CHECK: encoding: [0x20,0xa1,0x61]
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xsr.dbreakc1 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, dbreakc1
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#CHECK: encoding: [0x20,0xa1,0x61]
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xsr a2, 161
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreakenable
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#CHECK: encoding: [0x20,0x60,0x61]
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xsr a2,ibreakenable
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreakenable
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#CHECK: encoding: [0x20,0x60,0x61]
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xsr.ibreakenable a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, ibreakenable
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#CHECK: encoding: [0x20,0x60,0x61]
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xsr a2, 96
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#Instruction format RRR
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#CHECK-INST: rsr a2, debugcause
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#CHECK: encoding: [0x20,0xe9,0x03]
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rsr a2,debugcause
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#Instruction format RRR
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#CHECK-INST: rsr a2, debugcause
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#CHECK: encoding: [0x20,0xe9,0x03]
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rsr.debugcause a2
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#Instruction format RRR
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#CHECK-INST: rsr a2, debugcause
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#CHECK: encoding: [0x20,0xe9,0x03]
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rsr a2, 233
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#Instruction format RRR
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#CHECK-INST: xsr a2, ddr
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#CHECK: encoding: [0x20,0x68,0x61]
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xsr a2,ddr
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#Instruction format RRR
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#CHECK-INST: xsr a2, ddr
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#CHECK: encoding: [0x20,0x68,0x61]
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xsr.ddr a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, ddr
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#CHECK: encoding: [0x20,0x68,0x61]
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xsr a2, 104
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