derek.holloway
7502bf64a4
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281 lines
5.5 KiB
ArmAsm
281 lines
5.5 KiB
ArmAsm
# RUN: llvm-mc %s -triple=xtensa -show-encoding --mattr=+highpriinterrupts,+highpriinterrupts-level7 \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
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.align 4
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LBL0:
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# Instruction format RRR
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# CHECK-INST: rfi 1
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# CHECK: encoding: [0x10,0x31,0x00]
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rfi 1
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc2
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#CHECK: encoding: [0x20,0xb2,0x61]
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xsr a2,epc2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc2
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#CHECK: encoding: [0x20,0xb2,0x61]
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xsr.epc2 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc2
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#CHECK: encoding: [0x20,0xb2,0x61]
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xsr a2, 178
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc3
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#CHECK: encoding: [0x20,0xb3,0x61]
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xsr a2,epc3
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc3
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#CHECK: encoding: [0x20,0xb3,0x61]
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xsr.epc3 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc3
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#CHECK: encoding: [0x20,0xb3,0x61]
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xsr a2, 179
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc4
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#CHECK: encoding: [0x20,0xb4,0x61]
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xsr a2,epc4
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc4
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#CHECK: encoding: [0x20,0xb4,0x61]
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xsr.epc4 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc4
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#CHECK: encoding: [0x20,0xb4,0x61]
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xsr a2, 180
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc5
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#CHECK: encoding: [0x20,0xb5,0x61]
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xsr a2,epc5
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc5
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#CHECK: encoding: [0x20,0xb5,0x61]
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xsr.epc5 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc5
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#CHECK: encoding: [0x20,0xb5,0x61]
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xsr a2, 181
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc6
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#CHECK: encoding: [0x20,0xb6,0x61]
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xsr a2,epc6
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc6
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#CHECK: encoding: [0x20,0xb6,0x61]
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xsr.epc6 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc6
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#CHECK: encoding: [0x20,0xb6,0x61]
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xsr a2, 182
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc7
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#CHECK: encoding: [0x20,0xb7,0x61]
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xsr a2,epc7
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc7
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#CHECK: encoding: [0x20,0xb7,0x61]
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xsr.epc7 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, epc7
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#CHECK: encoding: [0x20,0xb7,0x61]
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xsr a2, 183
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps2
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#CHECK: encoding: [0x20,0xc2,0x61]
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xsr a2,eps2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps2
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#CHECK: encoding: [0x20,0xc2,0x61]
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xsr.eps2 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps2
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#CHECK: encoding: [0x20,0xc2,0x61]
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xsr a2, 194
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps3
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#CHECK: encoding: [0x20,0xc3,0x61]
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xsr a2,eps3
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps3
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#CHECK: encoding: [0x20,0xc3,0x61]
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xsr.eps3 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps3
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#CHECK: encoding: [0x20,0xc3,0x61]
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xsr a2, 195
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps4
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#CHECK: encoding: [0x20,0xc4,0x61]
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xsr a2,eps4
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps4
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#CHECK: encoding: [0x20,0xc4,0x61]
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xsr.eps4 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps4
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#CHECK: encoding: [0x20,0xc4,0x61]
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xsr a2, 196
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps5
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#CHECK: encoding: [0x20,0xc5,0x61]
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xsr a2,eps5
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps5
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#CHECK: encoding: [0x20,0xc5,0x61]
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xsr.eps5 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps5
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#CHECK: encoding: [0x20,0xc5,0x61]
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xsr a2, 197
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps6
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#CHECK: encoding: [0x20,0xc6,0x61]
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xsr a2,eps6
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps6
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#CHECK: encoding: [0x20,0xc6,0x61]
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xsr.eps6 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps6
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#CHECK: encoding: [0x20,0xc6,0x61]
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xsr a2, 198
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps7
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#CHECK: encoding: [0x20,0xc7,0x61]
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xsr a2,eps7
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps7
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#CHECK: encoding: [0x20,0xc7,0x61]
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xsr.eps7 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, eps7
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#CHECK: encoding: [0x20,0xc7,0x61]
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xsr a2, 199
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave2
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#CHECK: encoding: [0x20,0xd2,0x61]
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xsr a2,excsave2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave2
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#CHECK: encoding: [0x20,0xd2,0x61]
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xsr.excsave2 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave2
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#CHECK: encoding: [0x20,0xd2,0x61]
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xsr a2, 210
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave3
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#CHECK: encoding: [0x20,0xd3,0x61]
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xsr a2,excsave3
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave3
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#CHECK: encoding: [0x20,0xd3,0x61]
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xsr.excsave3 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave3
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#CHECK: encoding: [0x20,0xd3,0x61]
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xsr a2, 211
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave4
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#CHECK: encoding: [0x20,0xd4,0x61]
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xsr a2,excsave4
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave4
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#CHECK: encoding: [0x20,0xd4,0x61]
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xsr.excsave4 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave4
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#CHECK: encoding: [0x20,0xd4,0x61]
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xsr a2, 212
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave5
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#CHECK: encoding: [0x20,0xd5,0x61]
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xsr a2,excsave5
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave5
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#CHECK: encoding: [0x20,0xd5,0x61]
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xsr.excsave5 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave5
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#CHECK: encoding: [0x20,0xd5,0x61]
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xsr a2, 213
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave6
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#CHECK: encoding: [0x20,0xd6,0x61]
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xsr a2,excsave6
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave6
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#CHECK: encoding: [0x20,0xd6,0x61]
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xsr.excsave6 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave6
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#CHECK: encoding: [0x20,0xd6,0x61]
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xsr a2, 214
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave7
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#CHECK: encoding: [0x20,0xd7,0x61]
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xsr a2,excsave7
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave7
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#CHECK: encoding: [0x20,0xd7,0x61]
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xsr.excsave7 a2
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#Instruction format RRR
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#CHECK-INST: xsr a2, excsave7
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#CHECK: encoding: [0x20,0xd7,0x61]
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xsr a2, 215
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