derek.holloway
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57 lines
2.1 KiB
TableGen
57 lines
2.1 KiB
TableGen
// RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
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// RUN: -combiners=MyCombiner %s | FileCheck %s
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// Checks that temporary registers defined in apply patterns
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// are emitted with RegState::Define.
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include "llvm/Target/Target.td"
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include "llvm/Target/GlobalISel/Combine.td"
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def MyTargetISA : InstrInfo;
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def MyTarget : Target { let InstructionSet = MyTargetISA; }
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def Test0 : GICombineRule<
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(defs root:$dst),
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(match (G_ADD $dst, $lhs, $rhs)),
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(apply (G_UDIVREM $tmp, $dst, $lhs, $rhs))
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>;
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def Test1 : GICombineRule<
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(defs root:$dst),
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(match (G_ADD $dst, $lhs, $rhs)),
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(apply (G_UDIVREM $dst, $tmp, $lhs, $rhs))
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>;
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def Test2 : GICombineRule<
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(defs root:$dst),
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(match (G_ADD $dst, $lhs, $rhs)),
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(apply (G_ADD $tmp, 0, $lhs),
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(G_ADD $dst, $tmp, $rhs))
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>;
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def MyCombiner: GICombiner<"GenMyCombiner", [
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Test0,
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Test1,
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Test2,
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]>;
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// CHECK: // Combiner Rule #0: Test0
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UDIVREM),
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// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // lhs
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/2, // rhs
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// CHECK: // Combiner Rule #1: Test1
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UDIVREM),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // lhs
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/2, // rhs
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// CHECK: // Combiner Rule #2: Test2
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD),
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// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
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// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/1,
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // lhs
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