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36 lines
1.6 KiB
TableGen
36 lines
1.6 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns \
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// RUN: -I %p/../../../include -I %p/../Common %s 2> %t | FileCheck %s
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// RUN: FileCheck -check-prefix=ERR %s < %t
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def undef_tied_1 : OperandWithDefaultOps<untyped, (ops (i32 undef_tied_input))> {
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let MIOperandInfo = (ops GPR32:$inactive);
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}
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def undef_tied_2 : OperandWithDefaultOps<i32, (ops (untyped undef_tied_input))> {
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let MIOperandInfo = (ops GPR32:$inactive);
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}
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let Constraints = "$opt.inactive = $rd" in
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def I1 : I<(outs GPR32:$rd), (ins GPR32:$rs, undef_tied_1:$opt),
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[(set GPR32:$rd, (abs i32:$rs))]>;
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// ERR: [[#@LINE+2]]:5: warning: Skipped pattern: unsupported type
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let Constraints = "$opt.inactive = $rd" in
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def I2 : I<(outs GPR32:$rd), (ins GPR32:$rs, undef_tied_2:$opt),
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[(set GPR32:$rd, (abs i32:$rs))]>;
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// CHECK-LABEL: // (abs:{ *:[i32] } i32:{ *:[i32] }:$rs) => (I1:{ *:[i32] } i32:{ *:[i32] }:$rs)
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// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
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// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
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// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::I1),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[rd]
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // rs
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// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
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// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
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// CHECK-NEXT: // GIR_Coverage, 0,
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// CHECK-NEXT: GIR_EraseRootFromParent_Done,
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