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44 lines
2.1 KiB
TableGen
44 lines
2.1 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -optimize-match-table=false -I %p/../../../include -I %p/../Common %s | FileCheck %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def P0 : Register<"p0"> { let Namespace = "MyTarget"; }
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def PR32 : RegisterClass<"MyTarget", [i32], 32, (add P0)>;
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def PR32Op : RegisterOperand<PR32>;
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def pred : PredicateOperand<OtherVT,
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(ops PR32:$FR),
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(ops (i32 zero_reg))> {}
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class PredI<dag OOps, dag IOps, list<dag> Pat>
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: Instruction {
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let Namespace = "MyTarget";
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let OutOperandList = OOps;
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let InOperandList = !con(IOps, (ins pred:$pred));
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let Pattern = Pat;
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}
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def INST : PredI<(outs GPR32:$dst), (ins GPR32:$src), []>;
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// CHECK: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_LOAD),
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// CHECK-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
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// CHECK-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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// CHECK-NEXT: // MIs[0] DstI[dst]
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// CHECK-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK-NEXT: // MIs[0] src
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// CHECK-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
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// CHECK-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK-NEXT: // (ld:{ *:[i32] } GPR32:{ *:[i32] }:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>> => (INST:{ *:[i32] } GPR32:{ *:[i32] }:$src)
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// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::INST),
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
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// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // src
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// CHECK-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::NoRegister), /*AddRegisterRegFlags*/GIMT_Encode2(0),
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// CHECK-NEXT: GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
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// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
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// CHECK-NEXT: // GIR_Coverage
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// CHECK-NEXT: GIR_EraseRootFromParent_Done,
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def : Pat<(i32 (load GPR32:$src)),
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(INST GPR32:$src)>;
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