derek.holloway
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86 lines
3.2 KiB
LLVM
86 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
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; RUN: opt -S -passes=argpromotion < %s | FileCheck %s
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; Test that we only promote arguments when the caller/callee have compatible
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; function attrubtes.
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target triple = "x86_64-unknown-linux-gnu"
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define internal fastcc void @no_promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
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; CHECK-LABEL: define {{[^@]+}}@no_promote_avx2
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; CHECK-SAME: (ptr [[ARG:%.*]], ptr readonly [[ARG1:%.*]])
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = load <4 x i64>, ptr [[ARG1]]
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; CHECK-NEXT: store <4 x i64> [[TMP]], ptr [[ARG]]
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = load <4 x i64>, ptr %arg1
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store <4 x i64> %tmp, ptr %arg
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ret void
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}
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define void @no_promote(ptr %arg) #1 {
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; CHECK-LABEL: define {{[^@]+}}@no_promote
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; CHECK-SAME: (ptr [[ARG:%.*]])
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; CHECK-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
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; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 32 [[TMP]], i8 0, i64 32, i1 false)
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; CHECK-NEXT: call fastcc void @no_promote_avx2(ptr [[TMP2]], ptr [[TMP]])
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; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
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; CHECK-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = alloca <4 x i64>, align 32
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%tmp2 = alloca <4 x i64>, align 32
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call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
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call fastcc void @no_promote_avx2(ptr %tmp2, ptr %tmp)
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%tmp4 = load <4 x i64>, ptr %tmp2, align 32
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store <4 x i64> %tmp4, ptr %arg, align 2
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ret void
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}
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define internal fastcc void @promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
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; CHECK-LABEL: define {{[^@]+}}@promote_avx2
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; CHECK-SAME: (ptr [[ARG:%.*]], <4 x i64> [[ARG1_VAL:%.*]])
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; CHECK-NEXT: bb:
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; CHECK-NEXT: store <4 x i64> [[ARG1_VAL]], ptr [[ARG]]
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = load <4 x i64>, ptr %arg1
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store <4 x i64> %tmp, ptr %arg
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ret void
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}
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define void @promote(ptr %arg) #0 {
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; CHECK-LABEL: define {{[^@]+}}@promote
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; CHECK-SAME: (ptr [[ARG:%.*]])
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
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; CHECK-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
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; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 32 [[TMP]], i8 0, i64 32, i1 false)
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; CHECK-NEXT: [[TMP_VAL:%.*]] = load <4 x i64>, ptr [[TMP]]
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; CHECK-NEXT: call fastcc void @promote_avx2(ptr [[TMP2]], <4 x i64> [[TMP_VAL]])
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; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
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; CHECK-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = alloca <4 x i64>, align 32
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%tmp2 = alloca <4 x i64>, align 32
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call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
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call fastcc void @promote_avx2(ptr %tmp2, ptr %tmp)
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%tmp4 = load <4 x i64>, ptr %tmp2, align 32
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store <4 x i64> %tmp4, ptr %arg, align 2
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #2
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attributes #0 = { inlinehint norecurse nounwind uwtable "target-features"="+avx2" }
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attributes #1 = { nounwind uwtable }
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attributes #2 = { argmemonly nounwind }
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