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91 lines
4.5 KiB
LLVM
91 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
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; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s
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; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -mattr=+outline-atomics -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS
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define void @atomic_swap_f16(ptr %ptr, half %val) !prof !0 {
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; CHECK-LABEL: @atomic_swap_f16(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i16
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i16
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; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP1]] to i64
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; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i16) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1:![0-9]+]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to half
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f16(
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; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i16
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i16 [[TMP1]] acquire, align 2
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP2]] to half
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, half %val acquire
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ret void
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}
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define void @atomic_swap_f32(ptr %ptr, float %val) nounwind !prof !0 {
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; CHECK-LABEL: @atomic_swap_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i32
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP1]] to i64
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; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i32) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to float
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f32(
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; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i32
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i32 [[TMP1]] acquire, align 4
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, float %val acquire
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ret void
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}
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define void @atomic_swap_f64(ptr %ptr, double %val) nounwind !prof !0 {
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; CHECK-LABEL: @atomic_swap_f64(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i64
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP1]], ptr elementtype(i64) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP3]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP2]] to double
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f64(
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; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i64
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i64 [[TMP1]] acquire, align 8
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to double
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, double %val acquire
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ret void
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}
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!0 = !{!"function_entry_count", i64 1000}
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;.
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; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind }
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; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nounwind willreturn }
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;.
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; OUTLINE-ATOMICS: attributes #[[ATTR0:[0-9]+]] = { "target-features"="+outline-atomics" }
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; OUTLINE-ATOMICS: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-features"="+outline-atomics" }
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;.
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; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i64 1000}
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; CHECK: [[PROF1]] = !{!"unknown", !"atomic-expand"}
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;.
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; OUTLINE-ATOMICS: [[META0:![0-9]+]] = !{!"function_entry_count", i64 1000}
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;.
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