derek.holloway
7502bf64a4
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353 lines
23 KiB
LLVM
353 lines
23 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck -check-prefix=GFX908 %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck -check-prefix=GFX90A %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck -check-prefix=GFX942 %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck -check-prefix=GFX1100 %s
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define float @syncscope_system(ptr %addr, float %val) {
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; GFX908-LABEL: @syncscope_system(
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; GFX908-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
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; GFX908-NEXT: br label [[ATOMICRMW_START:%.*]]
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; GFX908: atomicrmw.start:
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; GFX908-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
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; GFX908-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
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; GFX908-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
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; GFX908-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
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; GFX908-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0:![0-9]+]]
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; GFX908-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
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; GFX908-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
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; GFX908-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
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; GFX908-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; GFX908: atomicrmw.end:
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; GFX908-NEXT: ret float [[TMP5]]
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;
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; GFX90A-LABEL: @syncscope_system(
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; GFX90A-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR:%.*]])
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; GFX90A-NEXT: br i1 [[IS_SHARED]], label [[ATOMICRMW_SHARED:%.*]], label [[ATOMICRMW_CHECK_PRIVATE:%.*]]
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; GFX90A: atomicrmw.shared:
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; GFX90A-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(3)
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; GFX90A-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr addrspace(3) [[TMP1]], float [[VAL:%.*]] seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0:![0-9]+]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI:%.*]]
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; GFX90A: atomicrmw.check.private:
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; GFX90A-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[ADDR]])
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; GFX90A-NEXT: br i1 [[IS_PRIVATE]], label [[ATOMICRMW_PRIVATE:%.*]], label [[ATOMICRMW_GLOBAL:%.*]]
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; GFX90A: atomicrmw.private:
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; GFX90A-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
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; GFX90A-NEXT: [[LOADED_PRIVATE:%.*]] = load float, ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: [[NEW:%.*]] = fadd float [[LOADED_PRIVATE]], [[VAL]]
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; GFX90A-NEXT: store float [[NEW]], ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.global:
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; GFX90A-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(1)
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; GFX90A-NEXT: [[TMP5:%.*]] = atomicrmw fadd ptr addrspace(1) [[TMP4]], float [[VAL]] seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.phi:
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; GFX90A-NEXT: [[RES:%.*]] = phi float [ [[TMP2]], [[ATOMICRMW_SHARED]] ], [ [[LOADED_PRIVATE]], [[ATOMICRMW_PRIVATE]] ], [ [[TMP5]], [[ATOMICRMW_GLOBAL]] ]
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; GFX90A-NEXT: br label [[ATOMICRMW_END:%.*]]
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; GFX90A: atomicrmw.end:
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; GFX90A-NEXT: ret float [[RES]]
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;
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; GFX942-LABEL: @syncscope_system(
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; GFX942-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0:![0-9]+]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX942-NEXT: ret float [[RES]]
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;
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; GFX1100-LABEL: @syncscope_system(
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; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0:![0-9]+]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX1100-NEXT: ret float [[RES]]
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;
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; GFX11-LABEL: @syncscope_system(
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; GFX11-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
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; GFX11-NEXT: br label [[ATOMICRMW_START:%.*]]
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; GFX11: atomicrmw.start:
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; GFX11-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; GFX11-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
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; GFX11-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
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; GFX11-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
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; GFX11-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
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; GFX11-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
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; GFX11-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
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; GFX11-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
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; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; GFX11: atomicrmw.end:
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; GFX11-NEXT: ret float [[TMP6]]
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%res = atomicrmw fadd ptr %addr, float %val seq_cst, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
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ret float %res
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}
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define float @syncscope_workgroup_rtn(ptr %addr, float %val) {
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; GFX908-LABEL: @syncscope_workgroup_rtn(
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; GFX908-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
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; GFX908-NEXT: br label [[ATOMICRMW_START:%.*]]
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; GFX908: atomicrmw.start:
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; GFX908-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
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; GFX908-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
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; GFX908-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
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; GFX908-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
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; GFX908-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("workgroup") seq_cst seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]]
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; GFX908-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
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; GFX908-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
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; GFX908-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
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; GFX908-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; GFX908: atomicrmw.end:
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; GFX908-NEXT: ret float [[TMP5]]
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;
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; GFX90A-LABEL: @syncscope_workgroup_rtn(
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; GFX90A-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR:%.*]])
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; GFX90A-NEXT: br i1 [[IS_SHARED]], label [[ATOMICRMW_SHARED:%.*]], label [[ATOMICRMW_CHECK_PRIVATE:%.*]]
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; GFX90A: atomicrmw.shared:
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; GFX90A-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(3)
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; GFX90A-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr addrspace(3) [[TMP1]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI:%.*]]
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; GFX90A: atomicrmw.check.private:
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; GFX90A-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[ADDR]])
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; GFX90A-NEXT: br i1 [[IS_PRIVATE]], label [[ATOMICRMW_PRIVATE:%.*]], label [[ATOMICRMW_GLOBAL:%.*]]
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; GFX90A: atomicrmw.private:
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; GFX90A-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
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; GFX90A-NEXT: [[LOADED_PRIVATE:%.*]] = load float, ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: [[NEW:%.*]] = fadd float [[LOADED_PRIVATE]], [[VAL]]
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; GFX90A-NEXT: store float [[NEW]], ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.global:
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; GFX90A-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(1)
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; GFX90A-NEXT: [[TMP5:%.*]] = atomicrmw fadd ptr addrspace(1) [[TMP4]], float [[VAL]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.phi:
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; GFX90A-NEXT: [[RES:%.*]] = phi float [ [[TMP2]], [[ATOMICRMW_SHARED]] ], [ [[LOADED_PRIVATE]], [[ATOMICRMW_PRIVATE]] ], [ [[TMP5]], [[ATOMICRMW_GLOBAL]] ]
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; GFX90A-NEXT: br label [[ATOMICRMW_END:%.*]]
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; GFX90A: atomicrmw.end:
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; GFX90A-NEXT: ret float [[RES]]
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;
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; GFX942-LABEL: @syncscope_workgroup_rtn(
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; GFX942-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX942-NEXT: ret float [[RES]]
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;
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; GFX1100-LABEL: @syncscope_workgroup_rtn(
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; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX1100-NEXT: ret float [[RES]]
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;
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; GFX11-LABEL: @syncscope_workgroup_rtn(
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; GFX11-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
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; GFX11-NEXT: br label [[ATOMICRMW_START:%.*]]
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; GFX11: atomicrmw.start:
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; GFX11-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; GFX11-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
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; GFX11-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
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; GFX11-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
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; GFX11-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP4]], i32 [[TMP3]] syncscope("workgroup") seq_cst seq_cst, align 4
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; GFX11-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
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; GFX11-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
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; GFX11-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
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; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; GFX11: atomicrmw.end:
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; GFX11-NEXT: ret float [[TMP6]]
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%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
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ret float %res
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}
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define void @syncscope_workgroup_nortn(ptr %addr, float %val) {
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; GFX908-LABEL: @syncscope_workgroup_nortn(
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; GFX908-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR:%.*]])
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; GFX908-NEXT: br i1 [[IS_SHARED]], label [[ATOMICRMW_SHARED:%.*]], label [[ATOMICRMW_CHECK_PRIVATE:%.*]]
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; GFX908: atomicrmw.shared:
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; GFX908-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(3)
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; GFX908-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr addrspace(3) [[TMP1]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX908-NEXT: br label [[ATOMICRMW_PHI:%.*]]
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; GFX908: atomicrmw.check.private:
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; GFX908-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[ADDR]])
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; GFX908-NEXT: br i1 [[IS_PRIVATE]], label [[ATOMICRMW_PRIVATE:%.*]], label [[ATOMICRMW_GLOBAL:%.*]]
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; GFX908: atomicrmw.private:
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; GFX908-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
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; GFX908-NEXT: [[LOADED_PRIVATE:%.*]] = load float, ptr addrspace(5) [[TMP3]], align 4
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; GFX908-NEXT: [[NEW:%.*]] = fadd float [[LOADED_PRIVATE]], [[VAL]]
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; GFX908-NEXT: store float [[NEW]], ptr addrspace(5) [[TMP3]], align 4
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; GFX908-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX908: atomicrmw.global:
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; GFX908-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(1)
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; GFX908-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[TMP4]], float [[VAL]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX908-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX908: atomicrmw.phi:
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; GFX908-NEXT: br label [[ATOMICRMW_END:%.*]]
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; GFX908: atomicrmw.end:
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; GFX908-NEXT: ret void
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;
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; GFX90A-LABEL: @syncscope_workgroup_nortn(
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; GFX90A-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR:%.*]])
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; GFX90A-NEXT: br i1 [[IS_SHARED]], label [[ATOMICRMW_SHARED:%.*]], label [[ATOMICRMW_CHECK_PRIVATE:%.*]]
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; GFX90A: atomicrmw.shared:
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; GFX90A-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(3)
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; GFX90A-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr addrspace(3) [[TMP1]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI:%.*]]
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; GFX90A: atomicrmw.check.private:
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; GFX90A-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[ADDR]])
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; GFX90A-NEXT: br i1 [[IS_PRIVATE]], label [[ATOMICRMW_PRIVATE:%.*]], label [[ATOMICRMW_GLOBAL:%.*]]
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; GFX90A: atomicrmw.private:
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; GFX90A-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
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; GFX90A-NEXT: [[LOADED_PRIVATE:%.*]] = load float, ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: [[NEW:%.*]] = fadd float [[LOADED_PRIVATE]], [[VAL]]
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; GFX90A-NEXT: store float [[NEW]], ptr addrspace(5) [[TMP3]], align 4
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.global:
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; GFX90A-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(1)
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; GFX90A-NEXT: [[RES:%.*]] = atomicrmw fadd ptr addrspace(1) [[TMP4]], float [[VAL]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
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; GFX90A: atomicrmw.phi:
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; GFX90A-NEXT: br label [[ATOMICRMW_END:%.*]]
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; GFX90A: atomicrmw.end:
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; GFX90A-NEXT: ret void
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;
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; GFX942-LABEL: @syncscope_workgroup_nortn(
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; GFX942-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX942-NEXT: ret void
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;
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; GFX1100-LABEL: @syncscope_workgroup_nortn(
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; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
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; GFX1100-NEXT: ret void
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;
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; GFX11-LABEL: @syncscope_workgroup_nortn(
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; GFX11-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
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; GFX11-NEXT: br label [[ATOMICRMW_START:%.*]]
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; GFX11: atomicrmw.start:
|
|
; GFX11-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX11-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX11-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX11-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX11-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP4]], i32 [[TMP3]] syncscope("workgroup") seq_cst seq_cst, align 4
|
|
; GFX11-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; GFX11-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; GFX11-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX11: atomicrmw.end:
|
|
; GFX11-NEXT: ret void
|
|
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
|
|
ret void
|
|
}
|
|
|
|
define float @no_unsafe(ptr %addr, float %val) {
|
|
; GFX908-LABEL: @no_unsafe(
|
|
; GFX908-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
|
|
; GFX908-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; GFX908: atomicrmw.start:
|
|
; GFX908-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX908-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX908-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX908-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX908-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("workgroup") seq_cst seq_cst, align 4
|
|
; GFX908-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
|
|
; GFX908-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
|
|
; GFX908-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX908-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX908: atomicrmw.end:
|
|
; GFX908-NEXT: ret float [[TMP5]]
|
|
;
|
|
; GFX90A-LABEL: @no_unsafe(
|
|
; GFX90A-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
|
|
; GFX90A-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; GFX90A: atomicrmw.start:
|
|
; GFX90A-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX90A-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX90A-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX90A-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX90A-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("workgroup") seq_cst seq_cst, align 4
|
|
; GFX90A-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
|
|
; GFX90A-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
|
|
; GFX90A-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX90A-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX90A: atomicrmw.end:
|
|
; GFX90A-NEXT: ret float [[TMP5]]
|
|
;
|
|
; GFX942-LABEL: @no_unsafe(
|
|
; GFX942-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] syncscope("workgroup") seq_cst, align 4
|
|
; GFX942-NEXT: ret float [[RES]]
|
|
;
|
|
; GFX1100-LABEL: @no_unsafe(
|
|
; GFX1100-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
|
|
; GFX1100-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; GFX1100: atomicrmw.start:
|
|
; GFX1100-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX1100-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX1100-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX1100-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX1100-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] syncscope("workgroup") seq_cst seq_cst, align 4
|
|
; GFX1100-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
|
|
; GFX1100-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
|
|
; GFX1100-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX1100-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX1100: atomicrmw.end:
|
|
; GFX1100-NEXT: ret float [[TMP5]]
|
|
;
|
|
; GFX11-LABEL: @no_unsafe(
|
|
; GFX11-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 4
|
|
; GFX11-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; GFX11: atomicrmw.start:
|
|
; GFX11-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX11-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX11-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX11-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX11-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP4]], i32 [[TMP3]] syncscope("workgroup") seq_cst seq_cst, align 4
|
|
; GFX11-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; GFX11-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; GFX11-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX11-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX11: atomicrmw.end:
|
|
; GFX11-NEXT: ret float [[TMP6]]
|
|
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst
|
|
ret float %res
|
|
}
|
|
|
|
define float @flat_atomicrmw_fadd_f32__align32(ptr %addr, float %val) {
|
|
; GFX908-LABEL: @flat_atomicrmw_fadd_f32__align32(
|
|
; GFX908-NEXT: [[TMP1:%.*]] = load float, ptr [[ADDR:%.*]], align 32
|
|
; GFX908-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; GFX908: atomicrmw.start:
|
|
; GFX908-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
|
|
; GFX908-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VAL:%.*]]
|
|
; GFX908-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
|
|
; GFX908-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
|
|
; GFX908-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[ADDR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 32, !amdgpu.no.fine.grained.memory [[META0]]
|
|
; GFX908-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
|
|
; GFX908-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
|
|
; GFX908-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
|
|
; GFX908-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; GFX908: atomicrmw.end:
|
|
; GFX908-NEXT: ret float [[TMP5]]
|
|
;
|
|
; GFX90A-LABEL: @flat_atomicrmw_fadd_f32__align32(
|
|
; GFX90A-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR:%.*]])
|
|
; GFX90A-NEXT: br i1 [[IS_SHARED]], label [[ATOMICRMW_SHARED:%.*]], label [[ATOMICRMW_CHECK_PRIVATE:%.*]]
|
|
; GFX90A: atomicrmw.shared:
|
|
; GFX90A-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(3)
|
|
; GFX90A-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr addrspace(3) [[TMP1]], float [[VAL:%.*]] seq_cst, align 32, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
|
|
; GFX90A-NEXT: br label [[ATOMICRMW_PHI:%.*]]
|
|
; GFX90A: atomicrmw.check.private:
|
|
; GFX90A-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(ptr [[ADDR]])
|
|
; GFX90A-NEXT: br i1 [[IS_PRIVATE]], label [[ATOMICRMW_PRIVATE:%.*]], label [[ATOMICRMW_GLOBAL:%.*]]
|
|
; GFX90A: atomicrmw.private:
|
|
; GFX90A-NEXT: [[TMP3:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
|
|
; GFX90A-NEXT: [[LOADED_PRIVATE:%.*]] = load float, ptr addrspace(5) [[TMP3]], align 32
|
|
; GFX90A-NEXT: [[NEW:%.*]] = fadd float [[LOADED_PRIVATE]], [[VAL]]
|
|
; GFX90A-NEXT: store float [[NEW]], ptr addrspace(5) [[TMP3]], align 32
|
|
; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
|
|
; GFX90A: atomicrmw.global:
|
|
; GFX90A-NEXT: [[TMP4:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(1)
|
|
; GFX90A-NEXT: [[TMP5:%.*]] = atomicrmw fadd ptr addrspace(1) [[TMP4]], float [[VAL]] seq_cst, align 32, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
|
|
; GFX90A-NEXT: br label [[ATOMICRMW_PHI]]
|
|
; GFX90A: atomicrmw.phi:
|
|
; GFX90A-NEXT: [[RES:%.*]] = phi float [ [[TMP2]], [[ATOMICRMW_SHARED]] ], [ [[LOADED_PRIVATE]], [[ATOMICRMW_PRIVATE]] ], [ [[TMP5]], [[ATOMICRMW_GLOBAL]] ]
|
|
; GFX90A-NEXT: br label [[ATOMICRMW_END:%.*]]
|
|
; GFX90A: atomicrmw.end:
|
|
; GFX90A-NEXT: ret float [[RES]]
|
|
;
|
|
; GFX942-LABEL: @flat_atomicrmw_fadd_f32__align32(
|
|
; GFX942-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] seq_cst, align 32, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
|
|
; GFX942-NEXT: ret float [[RES]]
|
|
;
|
|
; GFX1100-LABEL: @flat_atomicrmw_fadd_f32__align32(
|
|
; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR:%.*]], float [[VAL:%.*]] seq_cst, align 32, !amdgpu.no.fine.grained.memory [[META0]], !amdgpu.ignore.denormal.mode [[META0]]
|
|
; GFX1100-NEXT: ret float [[RES]]
|
|
;
|
|
%res = atomicrmw fadd ptr %addr, float %val seq_cst, align 32, !amdgpu.no.fine.grained.memory !0, !amdgpu.ignore.denormal.mode !0
|
|
ret float %res
|
|
}
|
|
|
|
!0 = !{}
|