derek.holloway
7502bf64a4
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61 lines
3.2 KiB
LLVM
61 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s
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; RUN: opt -mtriple=r600-mesa-mesa3d -S -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s
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define i32 @test_atomicrmw_nand_i32_flat(ptr %ptr, i32 %value) {
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; CHECK-LABEL: @test_atomicrmw_nand_i32_flat(
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -1
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; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 4
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
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; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 0
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret i32 [[NEWLOADED]]
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;
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%res = atomicrmw nand ptr %ptr, i32 %value seq_cst
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ret i32 %res
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}
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define i32 @test_atomicrmw_nand_i32_global(ptr addrspace(1) %ptr, i32 %value) {
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; CHECK-LABEL: @test_atomicrmw_nand_i32_global(
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(1) [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -1
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; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 4
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
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; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 0
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret i32 [[NEWLOADED]]
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;
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%res = atomicrmw nand ptr addrspace(1) %ptr, i32 %value seq_cst
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ret i32 %res
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}
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define i32 @test_atomicrmw_nand_i32_local(ptr addrspace(3) %ptr, i32 %value) {
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; CHECK-LABEL: @test_atomicrmw_nand_i32_local(
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -1
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; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 4
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
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; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 0
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret i32 [[NEWLOADED]]
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;
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%res = atomicrmw nand ptr addrspace(3) %ptr, i32 %value seq_cst
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ret i32 %res
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}
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