derek.holloway
7502bf64a4
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42 lines
1.5 KiB
LLVM
42 lines
1.5 KiB
LLVM
; RUN: opt -S -mtriple=riscv32 -mattr=+a -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s
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; Check that widenPartwordAtomicRMW preserves the volatile bit.
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define i8 @test_atomicrmw_and_i8_volatile(ptr %p) {
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; CHECK-LABEL: @test_atomicrmw_and_i8_volatile(
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; CHECK: atomicrmw volatile and ptr {{.*}}, i32 {{.*}} seq_cst, align 4
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%r = atomicrmw volatile and ptr %p, i8 15 seq_cst, align 1
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ret i8 %r
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}
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define i8 @test_atomicrmw_or_i8_volatile(ptr %p) {
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; CHECK-LABEL: @test_atomicrmw_or_i8_volatile(
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; CHECK: atomicrmw volatile or ptr {{.*}}, i32 {{.*}} seq_cst, align 4
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%r = atomicrmw volatile or ptr %p, i8 15 seq_cst, align 1
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ret i8 %r
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}
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define i8 @test_atomicrmw_xor_i8_volatile(ptr %p) {
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; CHECK-LABEL: @test_atomicrmw_xor_i8_volatile(
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; CHECK: atomicrmw volatile xor ptr {{.*}}, i32 {{.*}} seq_cst, align 4
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%r = atomicrmw volatile xor ptr %p, i8 15 seq_cst, align 1
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ret i8 %r
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}
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; Ensure the non-volatile case is not promoted to volatile.
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define i8 @test_atomicrmw_and_i8_nonvolatile(ptr %p) {
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; CHECK-LABEL: @test_atomicrmw_and_i8_nonvolatile(
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; CHECK-NOT: atomicrmw volatile
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; CHECK: atomicrmw and ptr {{.*}}, i32 {{.*}} seq_cst, align 4
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%r = atomicrmw and ptr %p, i8 15 seq_cst, align 1
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ret i8 %r
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}
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; Also exercise i16 widening.
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define i16 @test_atomicrmw_and_i16_volatile(ptr %p) {
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; CHECK-LABEL: @test_atomicrmw_and_i16_volatile(
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; CHECK: atomicrmw volatile and ptr {{.*}}, i32 {{.*}} seq_cst, align 4
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%r = atomicrmw volatile and ptr %p, i16 15 seq_cst, align 2
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ret i16 %r
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}
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