derek.holloway
7502bf64a4
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2644 lines
128 KiB
LLVM
2644 lines
128 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -mtriple=xtensa-- -passes='require<libcall-lowering-info>,atomic-expand' %s | FileCheck %s
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define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_xchg_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_exchange_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw xchg ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_xchg_i8_acquire(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_exchange_1(ptr [[A]], i8 [[B]], i32 2)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw xchg ptr %a, i8 %b acquire
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ret i8 %res
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}
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define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_xchg_i8_release(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_exchange_1(ptr [[A]], i8 [[B]], i32 3)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw xchg ptr %a, i8 %b release
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ret i8 %res
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}
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define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_xchg_i8_acq_rel(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_exchange_1(ptr [[A]], i8 [[B]], i32 4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw xchg ptr %a, i8 %b acq_rel
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ret i8 %res
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}
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define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_xchg_i8_seq_cst(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_exchange_1(ptr [[A]], i8 [[B]], i32 5)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw xchg ptr %a, i8 %b seq_cst
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ret i8 %res
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}
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define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_add_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_add_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw add ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_add_i8_acquire(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_add_1(ptr [[A]], i8 [[B]], i32 2)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw add ptr %a, i8 %b acquire
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ret i8 %res
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}
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define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_add_i8_release(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_add_1(ptr [[A]], i8 [[B]], i32 3)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw add ptr %a, i8 %b release
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ret i8 %res
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}
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define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_add_i8_acq_rel(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_add_1(ptr [[A]], i8 [[B]], i32 4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw add ptr %a, i8 %b acq_rel
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ret i8 %res
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}
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define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_add_i8_seq_cst(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_add_1(ptr [[A]], i8 [[B]], i32 5)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw add ptr %a, i8 %b seq_cst
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ret i8 %res
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}
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define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_sub_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_sub_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw sub ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_sub_i8_acquire(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_sub_1(ptr [[A]], i8 [[B]], i32 2)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw sub ptr %a, i8 %b acquire
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ret i8 %res
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}
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define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_sub_i8_release(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_sub_1(ptr [[A]], i8 [[B]], i32 3)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw sub ptr %a, i8 %b release
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ret i8 %res
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}
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define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_sub_i8_acq_rel(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_sub_1(ptr [[A]], i8 [[B]], i32 4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw sub ptr %a, i8 %b acq_rel
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ret i8 %res
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}
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define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_sub_i8_seq_cst(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_sub_1(ptr [[A]], i8 [[B]], i32 5)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw sub ptr %a, i8 %b seq_cst
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ret i8 %res
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}
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define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_and_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_and_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw and ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_and_i8_acquire(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_and_1(ptr [[A]], i8 [[B]], i32 2)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw and ptr %a, i8 %b acquire
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ret i8 %res
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}
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define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_and_i8_release(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_and_1(ptr [[A]], i8 [[B]], i32 3)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw and ptr %a, i8 %b release
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ret i8 %res
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}
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define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_and_i8_acq_rel(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_and_1(ptr [[A]], i8 [[B]], i32 4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw and ptr %a, i8 %b acq_rel
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ret i8 %res
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}
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define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_and_i8_seq_cst(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_and_1(ptr [[A]], i8 [[B]], i32 5)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw and ptr %a, i8 %b seq_cst
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ret i8 %res
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}
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define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_nand_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_nand_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw nand ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_nand_i8_acquire(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_nand_1(ptr [[A]], i8 [[B]], i32 2)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw nand ptr %a, i8 %b acquire
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ret i8 %res
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}
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define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_nand_i8_release(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_nand_1(ptr [[A]], i8 [[B]], i32 3)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw nand ptr %a, i8 %b release
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ret i8 %res
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}
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define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_nand_i8_acq_rel(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_nand_1(ptr [[A]], i8 [[B]], i32 4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw nand ptr %a, i8 %b acq_rel
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ret i8 %res
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}
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define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_nand_i8_seq_cst(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_nand_1(ptr [[A]], i8 [[B]], i32 5)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw nand ptr %a, i8 %b seq_cst
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ret i8 %res
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}
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define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_or_i8_monotonic(
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_or_1(ptr [[A]], i8 [[B]], i32 0)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%res = atomicrmw or ptr %a, i8 %b monotonic
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ret i8 %res
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}
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define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind {
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; CHECK-LABEL: define i8 @atomicrmw_or_i8_acquire(
|
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; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_or_1(ptr [[A]], i8 [[B]], i32 2)
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|
; CHECK-NEXT: ret i8 [[TMP1]]
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|
;
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|
%res = atomicrmw or ptr %a, i8 %b acquire
|
|
ret i8 %res
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|
}
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define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_or_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_or_1(ptr [[A]], i8 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_or_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_or_1(ptr [[A]], i8 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_or_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_or_1(ptr [[A]], i8 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_xor_i8_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_xor_1(ptr [[A]], i8 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i8 %b monotonic
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_xor_i8_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_xor_1(ptr [[A]], i8 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i8 %b acquire
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_xor_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_xor_1(ptr [[A]], i8 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_xor_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_xor_1(ptr [[A]], i8 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_xor_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @__atomic_fetch_xor_1(ptr [[A]], i8 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i8 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_max_i8_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i8 %b monotonic
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_max_i8_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i8 %b acquire
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_max_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_max_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_max_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_max_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_min_i8_monotonic(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_min_i8_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i8 %b monotonic
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_min_i8_acquire(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_min_i8_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i8 %b acquire
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_min_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_min_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_min_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_min_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_min_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_min_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umax_i8_monotonic(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umax_i8_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i8 %b monotonic
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umax_i8_acquire(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umax_i8_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i8 %b acquire
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umax_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umax_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umax_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umax_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umax_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umax_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umin_i8_monotonic(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umin_i8_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i8 %b monotonic
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umin_i8_acquire(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umin_i8_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i8 %b acquire
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umin_i8_release(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umin_i8_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i8 %b release
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umin_i8_acq_rel(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umin_i8_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i8 %b acq_rel
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @atomicrmw_umin_i8_seq_cst(ptr %a, i8 %b) nounwind {
|
|
; CHECK-LABEL: define i8 @atomicrmw_umin_i8_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i8, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @__atomic_load_1(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i8 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i8 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i8 [[LOADED]], i8 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i8 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_1(ptr [[A]], ptr [[TMP1]], i8 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i8, i1 } poison, i8 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i8, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i8, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i8, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i8 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i8 %b seq_cst
|
|
ret i8 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xchg_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xchg_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_exchange_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xchg_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xchg_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_exchange_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xchg_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xchg_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_exchange_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xchg_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xchg_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_exchange_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xchg_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xchg_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_exchange_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_add_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_add_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_add_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_add_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_add_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_add_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_add_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_add_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_add_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_add_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_add_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_add_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_add_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_add_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_add_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_sub_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_sub_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_sub_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_sub_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_sub_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_sub_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_sub_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_sub_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_sub_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_sub_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_sub_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_sub_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_sub_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_sub_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_sub_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_and_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_and_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_and_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_and_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_and_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_and_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_and_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_and_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_and_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_and_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_and_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_and_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_and_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_and_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_nand_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_nand_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw nand ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_nand_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_nand_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw nand ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_nand_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_nand_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw nand ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_nand_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_nand_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw nand ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_nand_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_nand_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw nand ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_or_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_or_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_or_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_or_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_or_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_or_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_or_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_or_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_or_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_or_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_or_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_or_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_or_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_or_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xor_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xor_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_xor_2(ptr [[A]], i16 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xor_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_xor_2(ptr [[A]], i16 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xor_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xor_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_xor_2(ptr [[A]], i16 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xor_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xor_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_xor_2(ptr [[A]], i16 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_xor_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_xor_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i16 @__atomic_fetch_xor_2(ptr [[A]], i16 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i16 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_max_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_max_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_max_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_max_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_max_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_max_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_max_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_max_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_max_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_max_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_min_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_min_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_min_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_min_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_min_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_min_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_min_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_min_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_min_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_min_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umax_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umax_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umax_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umax_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umax_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umax_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umax_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umax_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umax_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umax_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umin_i16_monotonic(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umin_i16_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i16 %b monotonic
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umin_i16_acquire(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umin_i16_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i16 %b acquire
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umin_i16_release(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umin_i16_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i16 %b release
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umin_i16_acq_rel(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umin_i16_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i16 %b acq_rel
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @atomicrmw_umin_i16_seq_cst(ptr %a, i16 %b) nounwind {
|
|
; CHECK-LABEL: define i16 @atomicrmw_umin_i16_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i16, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @__atomic_load_2(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i16 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i16 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i16 [[LOADED]], i16 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i16 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_2(ptr [[A]], ptr [[TMP1]], i16 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i16, i1 } poison, i16 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i16, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i16, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i16, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i16 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xchg_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xchg_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_exchange_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xchg_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xchg_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_exchange_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xchg_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xchg_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_exchange_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xchg_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xchg_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_exchange_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xchg_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xchg_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_exchange_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xchg ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_add_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_add_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_add_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_add_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_add_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_add_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_add_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_add_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_add_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_add_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_add_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_add_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_add_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_add_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_add_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw add ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_sub_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_sub_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_sub_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_sub_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_sub_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_sub_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_sub_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_sub_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_sub_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_sub_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_sub_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_sub_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_sub_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_sub_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_sub_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw sub ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_and_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_and_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_and_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_and_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_and_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_and_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_and_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_and_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_and_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_and_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_and_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_and_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_and_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_and_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_and_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw and ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
;define i32 @atomicrmw_nand_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; %res = atomicrmw nand ptr %a, i32 %b monotonic
|
|
; ret i32 %res
|
|
;}
|
|
;define i32 @atomicrmw_nand_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; %res = atomicrmw nand ptr %a, i32 %b acquire
|
|
; ret i32 %res
|
|
;}
|
|
;define i32 @atomicrmw_nand_i32_release(ptr %a, i32 %b) nounwind {
|
|
; %res = atomicrmw nand ptr %a, i32 %b release
|
|
; ret i32 %res
|
|
;}
|
|
;define i32 @atomicrmw_nand_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; %res = atomicrmw nand ptr %a, i32 %b acq_rel
|
|
; ret i32 %res
|
|
;}
|
|
;define i32 @atomicrmw_nand_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; %res = atomicrmw nand ptr %a, i32 %b seq_cst
|
|
; ret i32 %res
|
|
;}
|
|
|
|
define i32 @atomicrmw_or_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_or_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_or_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_or_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_or_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_or_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_or_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_or_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_or_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_or_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_or_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_or_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_or_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_or_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_or_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw or ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xor_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xor_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_xor_4(ptr [[A]], i32 [[B]], i32 0)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xor_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xor_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_xor_4(ptr [[A]], i32 [[B]], i32 2)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xor_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xor_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_xor_4(ptr [[A]], i32 [[B]], i32 3)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xor_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xor_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_xor_4(ptr [[A]], i32 [[B]], i32 4)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_xor_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_xor_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__atomic_fetch_xor_4(ptr [[A]], i32 [[B]], i32 5)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%res = atomicrmw xor ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_max_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_max_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_max_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_max_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_max_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_max_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_max_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_max_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_max_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_max_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw max ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_min_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_min_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_min_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_min_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_min_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_min_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_min_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_min_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_min_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_min_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp sle i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw min ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umax_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umax_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umax_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umax_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umax_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umax_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umax_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umax_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umax_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umax_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umax ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umin_i32_monotonic(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umin_i32_monotonic(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 0, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i32 %b monotonic
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umin_i32_acquire(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umin_i32_acquire(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 2, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i32 %b acquire
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umin_i32_release(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umin_i32_release(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 3, i32 0)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i32 %b release
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umin_i32_acq_rel(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umin_i32_acq_rel(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 4, i32 2)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i32 %b acq_rel
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @atomicrmw_umin_i32_seq_cst(ptr %a, i32 %b) nounwind {
|
|
; CHECK-LABEL: define i32 @atomicrmw_umin_i32_seq_cst(
|
|
; CHECK-SAME: ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__atomic_load_4(ptr [[A]], i32 0)
|
|
; CHECK-NEXT: br label %[[ATOMICRMW_START:.*]]
|
|
; CHECK: [[ATOMICRMW_START]]:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], %[[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[LOADED]], [[B]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP3]], i32 [[LOADED]], i32 [[B]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: store i32 [[LOADED]], ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(ptr [[A]], ptr [[TMP1]], i32 [[NEW]], i32 5, i32 5)
|
|
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP1]])
|
|
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } poison, i32 [[TMP5]], 0
|
|
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 [[TMP4]], 1
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label %[[ATOMICRMW_END:.*]], label %[[ATOMICRMW_START]]
|
|
; CHECK: [[ATOMICRMW_END]]:
|
|
; CHECK-NEXT: ret i32 [[NEWLOADED]]
|
|
;
|
|
%res = atomicrmw umin ptr %a, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|