derek.holloway
7502bf64a4
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126 lines
4.1 KiB
LLVM
126 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=bdce -S < %s | FileCheck %s
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; Funnel shift based rotate test cases from PR39771
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declare i32 @llvm.fshr.i32(i32, i32, i32)
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declare <2 x i32> @llvm.fshr.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
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; First fshr operand is dead.
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define i32 @pr39771_fshr_multi_use_instr(i32 %a) {
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; CHECK-LABEL: @pr39771_fshr_multi_use_instr(
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; CHECK-NEXT: [[X:%.*]] = or i32 [[A:%.*]], 2
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; CHECK-NEXT: [[B:%.*]] = tail call i32 @llvm.fshr.i32(i32 0, i32 [[X]], i32 1)
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; CHECK-NEXT: [[C:%.*]] = lshr i32 [[B]], 23
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; CHECK-NEXT: [[D:%.*]] = xor i32 [[C]], [[B]]
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; CHECK-NEXT: [[E:%.*]] = and i32 [[D]], 31
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; CHECK-NEXT: ret i32 [[E]]
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;
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%x = or i32 %a, 2
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%b = tail call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 1)
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%c = lshr i32 %b, 23
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%d = xor i32 %c, %b
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%e = and i32 %d, 31
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ret i32 %e
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}
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; First fshr operand is dead (vector variant).
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define <2 x i32> @pr39771_fshr_multi_use_instr_vec(<2 x i32> %a) {
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; CHECK-LABEL: @pr39771_fshr_multi_use_instr_vec(
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; CHECK-NEXT: [[X:%.*]] = or <2 x i32> [[A:%.*]], splat (i32 2)
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; CHECK-NEXT: [[B:%.*]] = tail call <2 x i32> @llvm.fshr.v2i32(<2 x i32> zeroinitializer, <2 x i32> [[X]], <2 x i32> splat (i32 1))
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; CHECK-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], splat (i32 23)
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; CHECK-NEXT: [[D:%.*]] = xor <2 x i32> [[C]], [[B]]
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; CHECK-NEXT: [[E:%.*]] = and <2 x i32> [[D]], splat (i32 31)
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; CHECK-NEXT: ret <2 x i32> [[E]]
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;
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%x = or <2 x i32> %a, <i32 2, i32 2>
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%b = tail call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 1, i32 1>)
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%c = lshr <2 x i32> %b, <i32 23, i32 23>
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%d = xor <2 x i32> %c, %b
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%e = and <2 x i32> %d, <i32 31, i32 31>
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ret <2 x i32> %e
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}
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; First fshr operand is dead, but it comes from an argument, not instruction.
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define i32 @pr39771_fshr_multi_use_arg(i32 %a) {
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; CHECK-LABEL: @pr39771_fshr_multi_use_arg(
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; CHECK-NEXT: [[B:%.*]] = tail call i32 @llvm.fshr.i32(i32 0, i32 [[A:%.*]], i32 1)
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; CHECK-NEXT: [[C:%.*]] = lshr i32 [[B]], 23
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; CHECK-NEXT: [[D:%.*]] = xor i32 [[C]], [[B]]
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; CHECK-NEXT: [[E:%.*]] = and i32 [[D]], 31
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; CHECK-NEXT: ret i32 [[E]]
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;
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%b = tail call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 1)
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%c = lshr i32 %b, 23
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%d = xor i32 %c, %b
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%e = and i32 %d, 31
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ret i32 %e
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}
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define i32 @pr39771_expanded_fshr_multi_use(i32 %a) {
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; CHECK-LABEL: @pr39771_expanded_fshr_multi_use(
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; CHECK-NEXT: [[TMP:%.*]] = lshr i32 [[A:%.*]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = shl i32 0, 31
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; CHECK-NEXT: [[B:%.*]] = or i32 [[TMP]], [[TMP2]]
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; CHECK-NEXT: [[C:%.*]] = lshr i32 [[B]], 23
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; CHECK-NEXT: [[D:%.*]] = xor i32 [[C]], [[B]]
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; CHECK-NEXT: [[E:%.*]] = and i32 [[D]], 31
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; CHECK-NEXT: ret i32 [[E]]
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;
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%tmp = lshr i32 %a, 1
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%tmp2 = shl i32 %a, 31
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%b = or i32 %tmp, %tmp2
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%c = lshr i32 %b, 23
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%d = xor i32 %c, %b
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%e = and i32 %d, 31
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ret i32 %e
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}
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; %b operand of %c will be dead initially, but later found live.
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define void @dead_use_invalidation(i32 %a) {
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; CHECK-LABEL: @dead_use_invalidation(
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; CHECK-NEXT: [[B:%.*]] = or i32 [[A:%.*]], 0
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; CHECK-NEXT: [[C:%.*]] = shl i32 [[B]], 31
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; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], 1
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; CHECK-NEXT: [[E:%.*]] = or i32 [[C]], 0
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; CHECK-NEXT: [[F:%.*]] = or i32 [[D]], 0
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; CHECK-NEXT: call void @dummy(i32 [[E]])
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; CHECK-NEXT: call void @dummy(i32 [[F]])
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; CHECK-NEXT: call void @dummy(i32 [[B]])
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; CHECK-NEXT: ret void
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;
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%b = or i32 %a, 0
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%c = shl i32 %b, 31
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%d = and i32 %c, 1
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%e = or i32 %c, 0
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%f = or i32 %d, 0
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call void @dummy(i32 %e)
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call void @dummy(i32 %f)
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call void @dummy(i32 %b)
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ret void
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}
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declare void @dummy(i32)
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define i64 @deadcode_self_reference() {
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; CHECK-LABEL: @deadcode_self_reference(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 0
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; CHECK: loop:
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[OR]], 0
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; CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[OR]] to i16
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; CHECK-NEXT: [[CALL:%.*]] = call i16 @use(i16 [[CONV]])
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; CHECK-NEXT: br label [[LOOP:%.*]]
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;
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entry:
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ret i64 0
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loop:
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%or = or i32 %or, 0
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%conv = trunc i32 %or to i16
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%call = call i16 @use(i16 %conv)
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br label %loop
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}
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declare void @use(i16)
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