derek.holloway
7502bf64a4
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77 lines
3.9 KiB
LLVM
77 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -codegenprepare %s | FileCheck %s
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; Make sure BypassSlowDivision doesn't drop debug info
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define i64 @sdiv64(i64 %a, i64 %b) {
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; CHECK-LABEL: @sdiv64(
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; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A:%.*]], [[B:%.*]], !dbg [[DBG6:![0-9]+]]
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; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -4294967296, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[TMP2]], 0, !dbg [[DBG6]]
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP9:%.*]], !dbg [[DBG6]]
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; CHECK: 4:
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; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[B]] to i32, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[A]] to i32, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP7:%.*]] = udiv i32 [[TMP6]], [[TMP5]], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64, !dbg [[DBG6]]
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; CHECK-NEXT: br label [[DOTSPLIT:%.*]], !dbg [[DBG6]]
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; CHECK: 9:
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; CHECK-NEXT: [[TMP10:%.*]] = sdiv i64 [[A]], [[B]], !dbg [[DBG6]]
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; CHECK-NEXT: br label [[DOTSPLIT]], !dbg [[DBG6]]
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; CHECK: .split:
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; CHECK-NEXT: [[TMP12:%.*]] = phi i64 [ [[TMP8]], [[TMP4]] ], [ [[TMP10]], [[TMP9]] ], !dbg [[DBG6]]
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; CHECK-NEXT: ret i64 [[TMP12]]
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;
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%d = sdiv i64 %a, %b, !dbg !6
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ret i64 %d
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}
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; FIXME: The debugloc for the rem parts end up with the dbg of the
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; division.
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define <2 x i64> @sdivrem64(i64 %a, i64 %b) {
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; CHECK-LABEL: @sdivrem64(
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; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A:%.*]], [[B:%.*]], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -4294967296, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[TMP2]], 0, !dbg [[DBG6]]
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP11:%.*]], !dbg [[DBG6]]
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; CHECK: 4:
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; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[B]] to i32, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[A]] to i32, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP7:%.*]] = udiv i32 [[TMP6]], [[TMP5]], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP8:%.*]] = urem i32 [[TMP6]], [[TMP5]], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP7]] to i64, !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP10:%.*]] = zext i32 [[TMP8]] to i64, !dbg [[DBG6]]
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; CHECK-NEXT: br label [[DOTSPLIT:%.*]], !dbg [[DBG6]]
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; CHECK: 11:
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; CHECK-NEXT: [[TMP12:%.*]] = sdiv i64 [[A]], [[B]], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP13:%.*]] = srem i64 [[A]], [[B]], !dbg [[DBG6]]
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; CHECK-NEXT: br label [[DOTSPLIT]], !dbg [[DBG6]]
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; CHECK: .split:
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; CHECK-NEXT: [[TMP15:%.*]] = phi i64 [ [[TMP9]], [[TMP4]] ], [ [[TMP12]], [[TMP11]] ], !dbg [[DBG6]]
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; CHECK-NEXT: [[TMP16:%.*]] = phi i64 [ [[TMP10]], [[TMP4]] ], [ [[TMP13]], [[TMP11]] ], !dbg [[DBG6]]
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; CHECK-NEXT: [[INS0:%.*]] = insertelement <2 x i64> undef, i64 [[TMP15]], i32 0
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; CHECK-NEXT: [[INS1:%.*]] = insertelement <2 x i64> [[INS0]], i64 [[TMP16]], i32 1
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; CHECK-NEXT: ret <2 x i64> [[INS1]]
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;
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%d = sdiv i64 %a, %b, !dbg !6
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%r = srem i64 %a, %b, !dbg !10
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%ins0 = insertelement <2 x i64> undef, i64 %d, i32 0
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%ins1 = insertelement <2 x i64> %ins0, i64 %r, i32 1
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ret <2 x i64> %ins1
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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!llvm.ident = !{!5}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.5 ", isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
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!1 = !DIFile(filename: "basic.c", directory: ".")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 1, !"Debug Info Version", i32 3}
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!5 = !{!"clang version 3.5 "}
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!6 = !DILocation(line: 3, scope: !7)
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!7 = distinct !DILexicalBlock(scope: !8, file: !1, line: 3)
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!8 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !9, scopeLine: 1, virtualIndex: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
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!9 = !DISubroutineType(types: !2)
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!10 = !DILocation(line: 4, scope: !7)
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