derek.holloway
7502bf64a4
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20 lines
903 B
LLVM
20 lines
903 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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; Make sure the nneg flag is dropped when lshr and zext are interchanged.
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define i8 @get(ptr %box, i32 %in) {
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; CHECK-LABEL: define i8 @get(
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; CHECK-SAME: ptr [[BOX:%.*]], i32 [[IN:%.*]]) {
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; CHECK-NEXT: [[PROMOTED:%.*]] = zext i32 [[IN]] to i64
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; CHECK-NEXT: [[SHR:%.*]] = lshr i64 [[PROMOTED]], 24
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BOX]], i64 [[SHR]]
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; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%shr = lshr i32 %in, 24
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%idxprom = zext nneg i32 %shr to i64
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%arrayidx = getelementptr inbounds i8, ptr %box, i64 %idxprom
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%res = load i8, ptr %arrayidx, align 1
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ret i8 %res
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}
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