derek.holloway
7502bf64a4
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77 lines
3.1 KiB
LLVM
77 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' %s | FileCheck %s
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target triple = "x86_64-unknown-linux"
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declare i1 @cond(float)
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define void @scaled_reg_does_not_dominate_insert_point(ptr %src) {
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; CHECK-LABEL: define void @scaled_reg_does_not_dominate_insert_point(
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; CHECK-SAME: ptr [[SRC:%.*]]) {
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; CHECK-NEXT: [[BB:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[SUNKADDR2:%.*]] = mul i64 [[IV_NEXT]], 2
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; CHECK-NEXT: [[SUNKADDR3:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[SUNKADDR2]]
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; CHECK-NEXT: [[SUNKADDR4:%.*]] = getelementptr i8, ptr [[SUNKADDR3]], i64 6
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; CHECK-NEXT: [[L_0:%.*]] = load float, ptr [[SUNKADDR4]], align 4
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; CHECK-NEXT: [[SUNKADDR:%.*]] = mul i64 [[IV]], 2
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; CHECK-NEXT: [[SUNKADDR1:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[SUNKADDR]]
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; CHECK-NEXT: [[L_1:%.*]] = load float, ptr [[SUNKADDR1]], align 4
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; CHECK-NEXT: [[TMP0:%.*]] = call i1 @cond(float [[L_0]])
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; CHECK-NEXT: [[C:%.*]] = call i1 @cond(float [[L_1]])
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; CHECK-NEXT: br i1 [[C]], label %[[LOOP]], label %[[EXIT:.*]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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bb:
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%gep.base = getelementptr i8, ptr %src, i64 8
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br label %loop
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loop:
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%iv = phi i64 [ 0, %bb ], [ %iv.next, %loop ]
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%iv.shl = shl i64 %iv, 1
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%gep.shl = getelementptr i8, ptr %gep.base, i64 %iv.shl
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%gep.sub = getelementptr i8, ptr %gep.shl, i64 -8
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%iv.next = add i64 %iv, 1
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%l.0 = load float, ptr %gep.shl, align 4
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%l.1 = load float, ptr %gep.sub, align 4
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call i1 @cond(float %l.0)
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%c = call i1 @cond(float %l.1)
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br i1 %c, label %loop, label %exit
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exit:
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ret void
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}
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define void @check_dt_after_modifying_cfg(ptr %dst, i64 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: define void @check_dt_after_modifying_cfg(
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; CHECK-SAME: ptr [[DST:%.*]], i64 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[OFFSET:%.*]] = lshr i64 [[X]], 2
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; CHECK-NEXT: [[SEL_FROZEN:%.*]] = freeze i8 [[Z]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[SEL_FROZEN]], 0
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; CHECK-NEXT: br i1 [[CMP]], label %[[SELECT_END:.*]], label %[[SELECT_FALSE_SINK:.*]]
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; CHECK: [[SELECT_FALSE_SINK]]:
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; CHECK-NEXT: [[SMIN:%.*]] = tail call i8 @llvm.smin.i8(i8 [[Y]], i8 0)
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; CHECK-NEXT: br label %[[SELECT_END]]
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; CHECK: [[SELECT_END]]:
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; CHECK-NEXT: [[SEL:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SMIN]], %[[SELECT_FALSE_SINK]] ]
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; CHECK-NEXT: [[SUNKADDR:%.*]] = getelementptr i8, ptr [[DST]], i64 [[OFFSET]]
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; CHECK-NEXT: store i8 [[SEL]], ptr [[SUNKADDR]], align 1
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; CHECK-NEXT: ret void
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;
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entry:
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%offset = lshr i64 %x, 2
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%gep.dst = getelementptr i8, ptr %dst, i64 %offset
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%smin = tail call i8 @llvm.smin.i8(i8 %y, i8 0)
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%cmp = icmp slt i8 %z, 0
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%sel = select i1 %cmp, i8 0, i8 %smin
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store i8 %sel, ptr %gep.dst, align 1
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ret void
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}
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declare i8 @llvm.smin.i8(i8, i8) #0
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