derek.holloway
7502bf64a4
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179 lines
8.2 KiB
LLVM
179 lines
8.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -aa-pipeline=basic-aa -passes=dse -S | FileCheck %s
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target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
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declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
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declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture, i8, i64, i32) nounwind
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declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
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declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i32) nounwind
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declare void @llvm.init.trampoline(ptr, ptr, ptr)
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;; Overwrite of memset by memcpy.
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define void @test17(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P:%.*]], ptr [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.p0.i64(ptr %P, i8 42, i64 8, i1 false)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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ret void
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}
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;; Overwrite of memset by memcpy.
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define void @test17_atomic(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @test17_atomic(
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; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[P:%.*]], ptr align 1 [[Q:%.*]], i64 12, i32 1)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %P, i8 42, i64 8, i32 1)
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tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 12, i32 1)
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ret void
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}
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;; Overwrite of memset by memcpy. Overwrite is stronger atomicity. We can
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;; remove the memset.
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define void @test17_atomic_weaker(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @test17_atomic_weaker(
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; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[P:%.*]], ptr align 1 [[Q:%.*]], i64 12, i32 1)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.p0.i64(ptr align 1 %P, i8 42, i64 8, i1 false)
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tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 12, i32 1)
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ret void
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}
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;; Overwrite of memset by memcpy. Overwrite is weaker atomicity. We can remove
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;; the memset.
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define void @test17_atomic_weaker_2(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @test17_atomic_weaker_2(
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[P:%.*]], ptr align 1 [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %P, i8 42, i64 8, i32 1)
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tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 12, i1 false)
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ret void
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}
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; Should not delete the volatile memset.
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define void @test17v(ptr %P, ptr %Q) nounwind ssp {
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; CHECK-LABEL: @test17v(
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; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P:%.*]], i8 42, i64 8, i1 true)
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P]], ptr [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.p0.i64(ptr %P, i8 42, i64 8, i1 true)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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ret void
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}
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; See PR11763 - LLVM allows memcpy's source and destination to be equal (but not
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; inequal and overlapping).
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define void @test18(ptr %P, ptr %Q, ptr %R) nounwind ssp {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P:%.*]], ptr [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P]], ptr [[R:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %R, i64 12, i1 false)
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ret void
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}
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define void @test18_atomic(ptr %P, ptr %Q, ptr %R) nounwind ssp {
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; CHECK-LABEL: @test18_atomic(
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; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[P:%.*]], ptr align 1 [[Q:%.*]], i64 12, i32 1)
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; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[P]], ptr align 1 [[R:%.*]], i64 12, i32 1)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 12, i32 1)
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tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %P, ptr align 1 %R, i64 12, i32 1)
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ret void
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}
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define void @test_memset_memcpy_inline(ptr noalias %P, ptr noalias %Q) {
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; CHECK-LABEL: @test_memset_memcpy_inline(
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; CHECK-NEXT: tail call void @llvm.memcpy.inline.p0.p0.i64(ptr align 1 [[P:%.*]], ptr align 1 [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.p0.i64(ptr %P, i8 42, i64 8, i1 false)
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tail call void @llvm.memcpy.inline.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 12, i1 false)
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ret void
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}
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define void @test_store_memcpy_inline(ptr noalias %P, ptr noalias %Q) {
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; CHECK-LABEL: @test_store_memcpy_inline(
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; CHECK-NEXT: [[P_4:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 4
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; CHECK-NEXT: store i8 4, ptr [[P_4]], align 1
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; CHECK-NEXT: tail call void @llvm.memcpy.inline.p0.p0.i64(ptr align 1 [[P]], ptr align 1 [[Q:%.*]], i64 4, i1 false)
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; CHECK-NEXT: ret void
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;
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store i8 0, ptr %P
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%P.1 = getelementptr i8, ptr %P, i64 1
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store i8 1, ptr %P.1
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%P.4 = getelementptr i8, ptr %P, i64 4
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store i8 4, ptr %P.4
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tail call void @llvm.memcpy.inline.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 4, i1 false)
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ret void
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}
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;; Overwrite of memset.pattern by memcpy.
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define void @memset_pattern_overwrite(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @memset_pattern_overwrite(
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P:%.*]], ptr [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.experimental.memset.pattern.p0.i64(ptr %P, i8 42, i64 8, i1 false)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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ret void
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}
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define void @memset_pattern_overwrite2(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @memset_pattern_overwrite2(
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P:%.*]], ptr [[Q:%.*]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.experimental.memset.pattern(ptr %P, i16 270, i64 4, i1 false)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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ret void
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}
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define void @memset_pattern_value_noalias(ptr %P, ptr noalias %Q) nounwind ssp {
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; CHECK-LABEL: @memset_pattern_value_noalias(
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; CHECK-NEXT: tail call void @llvm.experimental.memset.pattern.p0.p0.i64(ptr [[Q:%.*]], ptr [[P:%.*]], i64 8, i1 false)
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; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[P]], ptr [[Q]], i64 12, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.memset.p0.i64(ptr %P, i8 42, i64 8, i1 false)
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tail call void @llvm.experimental.memset.pattern.p0.i64(ptr %Q, ptr %P, i64 8, i1 false)
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tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
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ret void
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}
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define void @memset_pattern_value_noalias2(ptr %P) nounwind ssp {;
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; CHECK-LABEL: @memset_pattern_value_noalias2(
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; CHECK-NEXT: tail call void @llvm.experimental.memset.pattern.p0.p0.i64(ptr [[P:%.*]], ptr [[P]], i64 8, i1 false)
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; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P]], i8 42, i64 200, i1 false)
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; CHECK-NEXT: ret void
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;
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tail call void @llvm.experimental.memset.pattern.p0.i64(ptr %P, ptr %P, i64 8, i1 false)
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tail call void @llvm.memset.p0.i64(ptr %P, i8 42, i64 200, i1 false)
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ret void
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}
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define void @memset_pattern_value_noalias3(ptr %P) nounwind ssp {
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; CHECK-LABEL: @memset_pattern_value_noalias3(
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; CHECK-NEXT: [[Q:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 8
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; CHECK-NEXT: tail call void @llvm.experimental.memset.pattern.p0.p0.i64(ptr [[Q]], ptr [[P]], i64 8, i1 false)
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; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[Q]], i8 42, i64 200, i1 false)
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; CHECK-NEXT: ret void
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;
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%q = getelementptr i8, ptr %P, i32 8
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tail call void @llvm.experimental.memset.pattern.p0.i64(ptr %q, ptr %P, i64 8, i1 false)
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tail call void @llvm.memset.p0.i64(ptr %q, i8 42, i64 200, i1 false)
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ret void
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}
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declare void @llvm.memcpy.inline.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64 immarg, i1 immarg)
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