derek.holloway
7502bf64a4
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62 lines
3.2 KiB
LLVM
62 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -enable-scalar-pre=false -passes=gvn -S < %s | FileCheck %s --check-prefixes=CHECK
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; RUN: opt -enable-scalar-pre=true -passes=gvn -S < %s | FileCheck %s --check-prefixes=CHECK-ENABLED
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; RUN: opt -passes='gvn<no-scalar-pre>' -S < %s | FileCheck %s --check-prefixes=CHECK
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; RUN: opt -passes='gvn<scalar-pre>' -S < %s | FileCheck %s --check-prefixes=CHECK-ENABLED
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define void @test_scalar_pre_option(ptr %arr, i8 %cond) {
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; CHECK-LABEL: define void @test_scalar_pre_option(
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; CHECK-SAME: ptr [[ARR:%.*]], i8 [[COND:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i8 [[COND]], 0
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; CHECK-NEXT: [[TMP7_PRE:%.*]] = load i32, ptr [[ARR]], align 4
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; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]
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; CHECK: [[IF_THEN]]:
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7_PRE]], 2
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; CHECK-NEXT: [[GETELEM:%.*]] = getelementptr inbounds nuw i8, ptr [[ARR]], i64 8
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; CHECK-NEXT: store i32 [[ADD]], ptr [[GETELEM]], align 4
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; CHECK-NEXT: br label %[[IF_END]]
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; CHECK: [[IF_END]]:
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; CHECK-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP7_PRE]], 2
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; CHECK-NEXT: [[GETELEM1:%.*]] = getelementptr inbounds nuw i8, ptr [[ARR]], i64 12
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; CHECK-NEXT: store i32 [[ADD8]], ptr [[GETELEM1]], align 4
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; CHECK-NEXT: ret void
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;
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; CHECK-ENABLED-LABEL: define void @test_scalar_pre_option(
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; CHECK-ENABLED-SAME: ptr [[ARR:%.*]], i8 [[COND:%.*]]) {
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; CHECK-ENABLED-NEXT: [[ENTRY:.*:]]
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; CHECK-ENABLED-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i8 [[COND]], 0
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; CHECK-ENABLED-NEXT: [[TMP7_PRE:%.*]] = load i32, ptr [[ARR]], align 4
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; CHECK-ENABLED-NEXT: br i1 [[TOBOOL_NOT]], label %[[ENTRY_IF_END_CRIT_EDGE:.*]], label %[[IF_THEN:.*]]
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; CHECK-ENABLED: [[ENTRY_IF_END_CRIT_EDGE]]:
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; CHECK-ENABLED-NEXT: [[DOTPRE:%.*]] = add nsw i32 [[TMP7_PRE]], 2
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; CHECK-ENABLED-NEXT: br label %[[IF_END:.*]]
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; CHECK-ENABLED: [[IF_THEN]]:
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; CHECK-ENABLED-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7_PRE]], 2
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; CHECK-ENABLED-NEXT: [[GETELEM:%.*]] = getelementptr inbounds nuw i8, ptr [[ARR]], i64 8
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; CHECK-ENABLED-NEXT: store i32 [[ADD]], ptr [[GETELEM]], align 4
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; CHECK-ENABLED-NEXT: br label %[[IF_END]]
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; CHECK-ENABLED: [[IF_END]]:
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; CHECK-ENABLED-NEXT: [[ADD8_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], %[[ENTRY_IF_END_CRIT_EDGE]] ], [ [[ADD]], %[[IF_THEN]] ]
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; CHECK-ENABLED-NEXT: [[GETELEM1:%.*]] = getelementptr inbounds nuw i8, ptr [[ARR]], i64 12
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; CHECK-ENABLED-NEXT: store i32 [[ADD8_PRE_PHI]], ptr [[GETELEM1]], align 4
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; CHECK-ENABLED-NEXT: ret void
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;
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entry:
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%tobool.not = icmp eq i8 %cond, 0
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%tmp7.pre = load i32, ptr %arr, align 4
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br i1 %tobool.not, label %if.end, label %if.then
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if.then: ; preds = %entry
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%add = add nsw i32 %tmp7.pre, 2
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%getElem = getelementptr inbounds nuw i8, ptr %arr, i64 8
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store i32 %add, ptr %getElem, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%add8 = add nsw i32 %tmp7.pre, 2
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%getElem1 = getelementptr inbounds nuw i8, ptr %arr, i64 12
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store i32 %add8, ptr %getElem1, align 4
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ret void
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}
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