derek.holloway
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97 lines
3.5 KiB
LLVM
97 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
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; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
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; Make sure that each outlined region only analyzes on the incoming values in exit
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; block phi nodes that come from the outlined region. Without this, more incoming
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; values from the phi node would be considered if the incoming value is
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; included in the outlined region. This is particularly likely to happen for
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; constants.
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define void @f1() {
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bb1:
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%0 = add i32 1, 2
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%1 = add i32 3, 4
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%2 = add i32 5, 6
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%3 = add i32 7, 8
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br label %bb5
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bb2:
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%4 = mul i32 5, 4
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br label %bb5
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placeholder:
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%a = sub i32 5, 4
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br label %bb5
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bb3:
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%5 = add i32 1, 2
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%6 = add i32 3, 4
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%7 = add i32 5, 6
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%8 = add i32 7, 8
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br label %bb5
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bb4:
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%9 = mul i32 5, 4
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br label %bb5
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placeholder1:
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%b = add i32 5, 4
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ret void
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bb5:
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%phinode = phi i32 [5, %placeholder], [5, %bb1], [5, %bb2], [4, %bb3], [4, %bb4]
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ret void
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}
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; CHECK-LABEL: @f1(
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: [[PHINODE_CE_LOC1:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[PHINODE_CE_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[PHINODE_CE_LOC]])
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[PHINODE_CE_LOC]], i32 0)
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; CHECK-NEXT: [[PHINODE_CE_RELOAD:%.*]] = load i32, ptr [[PHINODE_CE_LOC]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[PHINODE_CE_LOC]])
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; CHECK-NEXT: br label [[BB5:%.*]]
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; CHECK: placeholder:
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; CHECK-NEXT: [[A:%.*]] = sub i32 5, 4
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; CHECK-NEXT: br label [[BB5]]
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; CHECK: bb3:
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[PHINODE_CE_LOC1]])
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[PHINODE_CE_LOC1]], i32 1)
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; CHECK-NEXT: [[PHINODE_CE_RELOAD2:%.*]] = load i32, ptr [[PHINODE_CE_LOC1]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[PHINODE_CE_LOC1]])
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; CHECK-NEXT: br label [[BB5]]
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; CHECK: placeholder1:
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; CHECK-NEXT: [[B:%.*]] = add i32 5, 4
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; CHECK-NEXT: ret void
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; CHECK: bb5:
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; CHECK-NEXT: [[PHINODE:%.*]] = phi i32 [ 5, [[PLACEHOLDER:%.*]] ], [ [[PHINODE_CE_RELOAD]], [[BB1:%.*]] ], [ [[PHINODE_CE_RELOAD2]], [[BB3:%.*]] ]
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: define internal void @outlined_ir_func_0(
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; CHECK-NEXT: newFuncRoot:
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; CHECK-NEXT: br label [[BB1_TO_OUTLINE:%.*]]
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; CHECK: bb1_to_outline:
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 1, 2
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 3, 4
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 5, 6
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; CHECK-NEXT: [[TMP5:%.*]] = add i32 7, 8
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; CHECK-NEXT: br label [[BB5_SPLIT:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[TMP6:%.*]] = mul i32 5, 4
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; CHECK-NEXT: br label [[BB5_SPLIT]]
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; CHECK: bb5.split:
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; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ 4, [[BB1_TO_OUTLINE]] ], [ 4, [[BB2:%.*]] ]
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; CHECK-NEXT: [[PHINODE_CE:%.*]] = phi i32 [ 5, [[BB1_TO_OUTLINE]] ], [ 5, [[BB2]] ]
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; CHECK-NEXT: br label [[BB5_EXITSTUB:%.*]]
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; CHECK: bb5.exitStub:
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; CHECK-NEXT: switch i32 [[TMP1:%.*]], label [[FINAL_BLOCK_0:%.*]] [
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; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_0_0:%.*]]
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; CHECK-NEXT: i32 1, label [[OUTPUT_BLOCK_1_0:%.*]]
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; CHECK-NEXT: ]
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; CHECK: output_block_0_0:
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; CHECK-NEXT: store i32 [[PHINODE_CE]], ptr [[TMP0:%.*]], align 4
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; CHECK-NEXT: br label [[FINAL_BLOCK_0]]
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; CHECK: output_block_1_0:
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; CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP0]], align 4
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; CHECK-NEXT: br label [[FINAL_BLOCK_0]]
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; CHECK: final_block_0:
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; CHECK-NEXT: ret void
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;
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