derek.holloway
7502bf64a4
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105 lines
3.5 KiB
LLVM
105 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 6
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; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
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; Verify that the IR outliner refuses to outline regions that contain
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; callsites marked with `nomerge`.
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declare void @f1(ptr, ptr);
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declare void @f2(ptr, ptr);
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define void @function1() {
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 2, ptr %a, align 4
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store i32 3, ptr %b, align 4
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store i32 4, ptr %c, align 4
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call void @f1(ptr %a, ptr %b) nomerge
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%al = load i32, ptr %a
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%bl = load i32, ptr %b
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%cl = load i32, ptr %c
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ret void
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}
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define void @function2() {
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 2, ptr %a, align 4
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store i32 3, ptr %b, align 4
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store i32 4, ptr %c, align 4
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call void @f1(ptr %a, ptr %b) nomerge
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%al = load i32, ptr %a
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%bl = load i32, ptr %b
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%cl = load i32, ptr %c
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ret void
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}
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define void @function3() {
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 2, ptr %a, align 4
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store i32 3, ptr %b, align 4
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store i32 4, ptr %c, align 4
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call void @f2(ptr %a, ptr %b) nomerge
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%al = load i32, ptr %a
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%bl = load i32, ptr %b
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%cl = load i32, ptr %c
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ret void
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}
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; CHECK-LABEL: define void @function1() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 2, ptr [[A]], align 4
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; CHECK-NEXT: store i32 3, ptr [[B]], align 4
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; CHECK-NEXT: store i32 4, ptr [[C]], align 4
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; CHECK-NEXT: call void @f1(ptr [[A]], ptr [[B]]) #[[ATTR1:[0-9]+]]
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: define void @function2() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 2, ptr [[A]], align 4
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; CHECK-NEXT: store i32 3, ptr [[B]], align 4
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; CHECK-NEXT: store i32 4, ptr [[C]], align 4
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; CHECK-NEXT: call void @f1(ptr [[A]], ptr [[B]]) #[[ATTR1]]
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: define void @function3() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 2, ptr [[A]], align 4
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; CHECK-NEXT: store i32 3, ptr [[B]], align 4
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; CHECK-NEXT: store i32 4, ptr [[C]], align 4
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; CHECK-NEXT: call void @f2(ptr [[A]], ptr [[B]]) #[[ATTR1]]
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; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: define internal void @outlined_ir_func_0(
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; CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]], ptr [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[NEWFUNCROOT:.*:]]
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; CHECK-NEXT: br label %[[ENTRY_TO_OUTLINE:.*]]
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; CHECK: [[ENTRY_TO_OUTLINE]]:
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; CHECK-NEXT: [[AL:%.*]] = load i32, ptr [[TMP0]], align 4
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; CHECK-NEXT: [[BL:%.*]] = load i32, ptr [[TMP1]], align 4
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; CHECK-NEXT: [[CL:%.*]] = load i32, ptr [[TMP2]], align 4
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; CHECK-NEXT: br label %[[ENTRY_AFTER_OUTLINE_EXITSTUB:.*]]
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; CHECK: [[ENTRY_AFTER_OUTLINE_EXITSTUB]]:
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; CHECK-NEXT: ret void
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;
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