derek.holloway
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30 lines
1.6 KiB
LLVM
30 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -mtriple=amdgcn-- -mattr=+wavefrontsize32 -passes=instcombine -S < %s | FileCheck --check-prefixes=CHECK,WAVE32 %s
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; RUN: opt -mtriple=amdgcn-- -mattr=+wavefrontsize64 -passes=instcombine -S < %s | FileCheck --check-prefixes=CHECK,WAVE64 %s
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; As the addition of 32 does not overflow, it can be canonicalized as gep.
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define amdgpu_ps <2 x float> @turn_add_into_gep(ptr addrspace(1) inreg %sbase) {
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; CHECK-LABEL: define amdgpu_ps <2 x float> @turn_add_into_gep(
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; CHECK-SAME: ptr addrspace(1) inreg [[SBASE:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[V:%.*]] = tail call range(i32 0, 33) i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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; CHECK-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[V]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[MUL]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [4 x i8], ptr addrspace(1) [[SBASE]], i64 [[TMP1]]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(1) [[TMP2]], i64 128
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; CHECK-NEXT: [[LOAD:%.*]] = load <2 x float>, ptr addrspace(1) [[GEP]], align 8
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; CHECK-NEXT: ret <2 x float> [[LOAD]]
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;
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%v = tail call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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%mul = shl i32 %v, 1
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%add = add i32 %mul, 32
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%zext.offset = zext i32 %add to i64
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%gep = getelementptr inbounds float, ptr addrspace(1) %sbase, i64 %zext.offset
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%load = load <2 x float>, ptr addrspace(1) %gep
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ret <2 x float> %load
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}
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32)
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; WAVE32: {{.*}}
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; WAVE64: {{.*}}
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