derek.holloway
7502bf64a4
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155 lines
6.0 KiB
LLVM
155 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -passes=amdgpu-codegenprepare < %s | FileCheck %s
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; Test mbcnt optimizations for wave32 architecture
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; Covers: simple replacement, bitmask optimization, copy optimization
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; =============================================================================
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; SIMPLE REPLACEMENT OPTIMIZATIONS (mbcnt.lo -> workitem.id.x)
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; =============================================================================
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; Test with work group size = wave size (32)
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define i32 @test_mbcnt_lo_simple_wave32() !reqd_work_group_size !0 {
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; CHECK-LABEL: define i32 @test_mbcnt_lo_simple_wave32(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]] !reqd_work_group_size [[META0:![0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 32) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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ret i32 %a
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}
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; =============================================================================
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; BITMASK OPTIMIZATIONS (mbcnt.lo -> workitem.id.x & 0x1f)
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; =============================================================================
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; Test with work group size = 2 * wave size (64)
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define i32 @test_mbcnt_lo_bitmask_64() !reqd_work_group_size !1 {
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; CHECK-LABEL: define i32 @test_mbcnt_lo_bitmask_64(
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; CHECK-SAME: ) #[[ATTR0]] !reqd_work_group_size [[META1:![0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 64) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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ret i32 %a
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}
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; Test with work group size = 3 * wave size (96)
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define i32 @test_mbcnt_lo_bitmask_96() !reqd_work_group_size !2 {
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; CHECK-LABEL: define i32 @test_mbcnt_lo_bitmask_96(
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; CHECK-SAME: ) #[[ATTR0]] !reqd_work_group_size [[META2:![0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 96) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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ret i32 %a
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}
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; Test with work group size = 0.75 * wave size (48)
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define i32 @test_mbcnt_lo_bitmask_48() !reqd_work_group_size !3 {
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; CHECK-LABEL: define i32 @test_mbcnt_lo_bitmask_48(
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; CHECK-SAME: ) #[[ATTR0]] !reqd_work_group_size [[META3:![0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 48) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[A:%.*]] = and i32 [[TMP0]], 31
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; CHECK-NEXT: ret i32 [[A]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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ret i32 %a
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}
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; =============================================================================
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; COPY OPTIMIZATION (mbcnt.hi(mask, val) -> val)
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; =============================================================================
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; Test with mask = wave32 range
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define i32 @test_mbcnt_hi_copy_basic(i32 %val) !reqd_work_group_size !0 {
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; CHECK-LABEL: define i32 @test_mbcnt_hi_copy_basic(
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; CHECK-SAME: i32 [[VAL:%.*]]) #[[ATTR0]] !reqd_work_group_size [[META0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret i32 [[VAL]]
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;
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entry:
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%result = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %val)
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ret i32 %result
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}
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; Test with partial mask
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define i32 @test_mbcnt_hi_copy_partial_mask(i32 %val) !reqd_work_group_size !0 {
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; CHECK-LABEL: define i32 @test_mbcnt_hi_copy_partial_mask(
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; CHECK-SAME: i32 [[VAL:%.*]]) #[[ATTR0]] !reqd_work_group_size [[META0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret i32 [[VAL]]
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;
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entry:
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%result = call i32 @llvm.amdgcn.mbcnt.hi(i32 65535, i32 %val)
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ret i32 %result
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}
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; =============================================================================
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; FULL PATTERN OPTIMIZATION (mbcnt.hi(~0, mbcnt.lo(~0, 0)) -> workitem.id.x)
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; =============================================================================
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; Test with work group size = wave size (32)
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define i32 @test_mbcnt_full_pattern_wave32() !reqd_work_group_size !0 {
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; CHECK-LABEL: define i32 @test_mbcnt_full_pattern_wave32(
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; CHECK-SAME: ) #[[ATTR0]] !reqd_work_group_size [[META0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 32) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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%b = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %a)
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ret i32 %b
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}
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; Test with work group size = 0.75 * wave size (48)
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define i32 @test_mbcnt_full_pattern_wave32_partial() !reqd_work_group_size !3 {
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; CHECK-LABEL: define i32 @test_mbcnt_full_pattern_wave32_partial(
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; CHECK-SAME: ) #[[ATTR0]] !reqd_work_group_size [[META3]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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; CHECK-NEXT: [[TMP0:%.*]] = call range(i32 0, 48) i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[B:%.*]] = and i32 [[TMP0]], 31
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; CHECK-NEXT: ret i32 [[B]]
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;
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entry:
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%a = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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%b = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %a)
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ret i32 %b
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}
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; =============================================================================
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; METADATA
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; =============================================================================
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!0 = !{i32 32, i32 1, i32 1} ; X=32 (1*wave32), Y=1, Z=1
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!1 = !{i32 64, i32 1, i32 1} ; X=64 (2*wave32), Y=1, Z=1
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!2 = !{i32 96, i32 1, i32 1} ; X=96 (3*wave32), Y=1, Z=1
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!3 = !{i32 48, i32 1, i32 1} ; X=48 (1.5*wave32), Y=1, Z=1
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; =============================================================================
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; FUNCTION DECLARATIONS
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; =============================================================================
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
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declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
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attributes #0 = { nounwind readnone speculatable willreturn }
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;.
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; CHECK: [[META0]] = !{i32 32, i32 1, i32 1}
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; CHECK: [[META1]] = !{i32 64, i32 1, i32 1}
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; CHECK: [[META2]] = !{i32 96, i32 1, i32 1}
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; CHECK: [[META3]] = !{i32 48, i32 1, i32 1}
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;.
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