derek.holloway
7502bf64a4
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53 lines
2.7 KiB
LLVM
53 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=instcombine < %s | FileCheck %s
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; ARM AES intrinsic variants
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define <16 x i8> @combineXorAeseZeroARM(<16 x i8> %data, <16 x i8> %key) {
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; CHECK-LABEL: define <16 x i8> @combineXorAeseZeroARM(
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; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {
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; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> [[DATA]], <16 x i8> [[KEY]])
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; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]
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;
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%data.xor = xor <16 x i8> %data, %key
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%data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> zeroinitializer)
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ret <16 x i8> %data.aes
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}
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define <16 x i8> @combineXorAeseNonZeroARM(<16 x i8> %data, <16 x i8> %key) {
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; CHECK-LABEL: define <16 x i8> @combineXorAeseNonZeroARM(
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; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {
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; CHECK-NEXT: [[DATA_XOR:%.*]] = xor <16 x i8> [[DATA]], [[KEY]]
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; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> [[DATA_XOR]], <16 x i8> splat (i8 -1))
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; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]
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;
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%data.xor = xor <16 x i8> %data, %key
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%data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
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ret <16 x i8> %data.aes
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}
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define <16 x i8> @combineXorAesdZeroARM(<16 x i8> %data, <16 x i8> %key) {
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; CHECK-LABEL: define <16 x i8> @combineXorAesdZeroARM(
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; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {
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; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> [[DATA]], <16 x i8> [[KEY]])
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; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]
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;
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%data.xor = xor <16 x i8> %data, %key
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%data.aes = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %data.xor, <16 x i8> zeroinitializer)
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ret <16 x i8> %data.aes
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}
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define <16 x i8> @combineXorAesdNonZeroARM(<16 x i8> %data, <16 x i8> %key) {
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; CHECK-LABEL: define <16 x i8> @combineXorAesdNonZeroARM(
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; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {
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; CHECK-NEXT: [[DATA_XOR:%.*]] = xor <16 x i8> [[DATA]], [[KEY]]
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; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> [[DATA_XOR]], <16 x i8> splat (i8 -1))
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; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]
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;
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%data.xor = xor <16 x i8> %data, %key
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%data.aes = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %data.xor, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
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ret <16 x i8> %data.aes
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}
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declare <16 x i8> @llvm.arm.neon.aese(<16 x i8>, <16 x i8>) #0
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declare <16 x i8> @llvm.arm.neon.aesd(<16 x i8>, <16 x i8>) #0
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