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224 lines
6.0 KiB
LLVM
224 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; (x&z) ^ (y&z) -> (x^y)&z
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define i32 @test1(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[T61:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[T7:%.*]] = and i32 [[Z:%.*]], [[T61]]
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; CHECK-NEXT: ret i32 [[T7]]
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;
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%t3 = and i32 %z, %x
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%t6 = and i32 %z, %y
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%t7 = xor i32 %t3, %t6
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ret i32 %t7
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}
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; (x & y) ^ (x|y) -> x^y
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define i32 @test2(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[T7:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
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; CHECK-NEXT: ret i32 [[T7]]
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;
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%t3 = and i32 %y, %x
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%t6 = or i32 %y, %x
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%t7 = xor i32 %t3, %t6
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ret i32 %t7
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}
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define i32 @PR38781(i32 %a, i32 %b) {
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; CHECK-LABEL: @PR38781(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
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; CHECK-NEXT: [[AND2:%.*]] = icmp sgt i32 [[TMP1]], -1
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; CHECK-NEXT: [[AND:%.*]] = zext i1 [[AND2]] to i32
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%a.lobit = lshr i32 %a, 31
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%a.lobit.not = xor i32 %a.lobit, 1
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%b.lobit = lshr i32 %b, 31
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%b.lobit.not = xor i32 %b.lobit, 1
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%and = and i32 %b.lobit.not, %a.lobit.not
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ret i32 %and
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}
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; (a ^ 4) & (a ^ ~4) -> 0
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define i32 @PR75692_1(i32 %x) {
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; CHECK-LABEL: @PR75692_1(
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; CHECK-NEXT: ret i32 0
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;
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%t2 = xor i32 %x, 4
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%t3 = xor i32 %x, -5
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%t4 = and i32 %t2, %t3
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ret i32 %t4
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}
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; (a ^ 4) & (a ^ 3) is not zero
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define i32 @PR75692_2(i32 %x) {
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; CHECK-LABEL: @PR75692_2(
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; CHECK-NEXT: [[T2:%.*]] = xor i32 [[X:%.*]], 4
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; CHECK-NEXT: [[T3:%.*]] = xor i32 [[X]], -4
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; CHECK-NEXT: [[T4:%.*]] = and i32 [[T2]], [[T3]]
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; CHECK-NEXT: ret i32 [[T4]]
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;
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%t2 = xor i32 %x, 4
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%t3 = xor i32 %x, -4
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%t4 = and i32 %t2, %t3
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ret i32 %t4
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}
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; (a ^ 4) & (b ^ ~4) is not zero, since a != b is possible
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define i32 @PR75692_3(i32 %x, i32 %y) {
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; CHECK-LABEL: @PR75692_3(
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; CHECK-NEXT: [[T2:%.*]] = xor i32 [[X:%.*]], 4
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; CHECK-NEXT: [[T3:%.*]] = xor i32 [[Y:%.*]], -5
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; CHECK-NEXT: [[T4:%.*]] = and i32 [[T2]], [[T3]]
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; CHECK-NEXT: ret i32 [[T4]]
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;
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%t2 = xor i32 %x, 4
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%t3 = xor i32 %y, -5
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%t4 = and i32 %t2, %t3
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ret i32 %t4
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}
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; ((X + C) & M) ^ M --> (~C − X) & M
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define i8 @add_and_xor_basic(i8 %x) {
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; CHECK-LABEL: @add_and_xor_basic(
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; CHECK-NEXT: [[ADD:%.*]] = sub i8 10, [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[ADD]], 15
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; CHECK-NEXT: ret i8 [[AND]]
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;
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%add = add i8 %x, 5
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%and = and i8 %add, 15
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%xor = xor i8 %and, 15
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ret i8 %xor
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}
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define <4 x i32> @add_and_xor_vector_splat(<4 x i32> %x) {
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; CHECK-LABEL: @add_and_xor_vector_splat(
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; CHECK-NEXT: [[ADD:%.*]] = sub <4 x i32> splat (i32 53), [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[ADD]], splat (i32 63)
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; CHECK-NEXT: ret <4 x i32> [[AND]]
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;
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%add = add <4 x i32> %x, <i32 10, i32 10, i32 10, i32 10>
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%and = and <4 x i32> %add, <i32 63, i32 63, i32 63, i32 63>
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%xor = xor <4 x i32> %and, <i32 63, i32 63, i32 63, i32 63>
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ret <4 x i32> %xor
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}
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define i32 @add_and_xor_overflow_addc(i32 %x) {
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; CHECK-LABEL: @add_and_xor_overflow_addc(
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; CHECK-NEXT: [[ADD:%.*]] = sub i32 27, [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], 31
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%add = add i32 %x, 100
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%and = and i32 %add, 31
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%xor = xor i32 %and, 31
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ret i32 %xor
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}
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define i32 @add_and_xor_negative_addc(i32 %x) {
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; CHECK-LABEL: @add_and_xor_negative_addc(
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; CHECK-NEXT: [[ADD:%.*]] = sub i32 1, [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], 255
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%add = add i32 %x, -2
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%and = and i32 %add, 255
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%xor = xor i32 %and, 255
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ret i32 %xor
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}
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define i8 @add_and_xor_not_low_mask(i8 %x) {
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; CHECK-LABEL: @add_and_xor_not_low_mask(
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; CHECK-NEXT: [[TMP1:%.*]] = sub i8 1, [[X:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = and i8 [[TMP1]], -18
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, -2
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%and = and i8 %add, 238
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%xor = xor i8 %and, 238
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ret i8 %xor
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}
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define i8 @add_and_xor_not_low_mask2(i8 %x) {
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; CHECK-LABEL: @add_and_xor_not_low_mask2(
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; CHECK-NEXT: [[TMP1:%.*]] = sub i8 1, [[X:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = and i8 [[TMP1]], 119
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, -2
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%and = and i8 %add, 119
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%xor = xor i8 %and, 119
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ret i8 %xor
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}
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define i8 @add_and_xor_not_low_mask3(i8 %x) {
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; CHECK-LABEL: @add_and_xor_not_low_mask3(
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; CHECK-NEXT: [[TMP1:%.*]] = sub i8 1, [[X:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = and i8 [[TMP1]], -91
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, -2
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%and = and i8 %add, 165
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%xor = xor i8 %and, 165
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ret i8 %xor
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}
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define i8 @add_and_xor_not_low_mask4(i8 %x) {
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; CHECK-LABEL: @add_and_xor_not_low_mask4(
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; CHECK-NEXT: [[TMP1:%.*]] = sub i8 1, [[X:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = and i8 [[TMP1]], -86
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, -2
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%and = and i8 %add, 170
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%xor = xor i8 %and, 170
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ret i8 %xor
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}
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; This test is trasformed to 'xor(and(add x, 11), 15), 15)' and being applied.
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define i8 @add_and_xor_sub_op(i8 %x) {
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; CHECK-LABEL: @add_and_xor_sub_op(
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; CHECK-NEXT: [[SUB:%.*]] = sub i8 4, [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[SUB]], 15
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; CHECK-NEXT: ret i8 [[AND]]
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;
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%sub = sub i8 %x, 5
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%and = and i8 %sub, 15
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%xor = xor i8 %and, 15
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ret i8 %xor
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}
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; and_xor_mask negative tests
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define i8 @neg_add_and_xor_mask_mismatch(i8 %x) {
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; CHECK-LABEL: @neg_add_and_xor_mask_mismatch(
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; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X:%.*]], 5
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[ADD]], 15
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; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[AND]], 7
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, 5
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%and = and i8 %add, 15
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%xor = xor i8 %and, 7
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ret i8 %xor
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}
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define i8 @neg_add_and_xor_multi_use(i8 %x) {
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; CHECK-LABEL: @neg_add_and_xor_multi_use(
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; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X:%.*]], 5
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; CHECK-NEXT: call void @use(i8 [[ADD]])
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[ADD]], 15
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; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[AND]], 15
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; CHECK-NEXT: ret i8 [[XOR]]
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;
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%add = add i8 %x, 5
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call void @use(i8 %add)
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%and = and i8 %add, 15
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%xor = xor i8 %and, 15
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ret i8 %xor
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}
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declare void @use(i8)
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