derek.holloway
7502bf64a4
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228 lines
8.1 KiB
LLVM
228 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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declare i32 @llvm.ctlz.i32(i32, i1)
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declare i32 @llvm.cttz.i32(i32, i1)
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
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declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)
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define i32 @lshr_ctlz_true(i32) {
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; CHECK-LABEL: define i32 @lshr_ctlz_true(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = add i32 [[TMP0]], 9
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; CHECK-NEXT: ret i32 [[CTLZ]]
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;
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%lshr = lshr i32 8387584, %0
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%ctlz = call i32 @llvm.ctlz.i32(i32 %lshr, i1 true)
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ret i32 %ctlz
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}
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define i32 @shl_nuw_ctlz_true(i32) {
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; CHECK-LABEL: define i32 @shl_nuw_ctlz_true(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = sub i32 9, [[TMP0]]
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; CHECK-NEXT: ret i32 [[CTLZ]]
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;
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%shl = shl nuw i32 8387584, %0
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%ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 true)
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ret i32 %ctlz
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}
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define i32 @shl_nuw_nsw_ctlz_true(i32) {
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; CHECK-LABEL: define i32 @shl_nuw_nsw_ctlz_true(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = sub i32 9, [[TMP0]]
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; CHECK-NEXT: ret i32 [[CTLZ]]
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;
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%shl = shl nuw nsw i32 8387584, %0
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%ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 true)
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ret i32 %ctlz
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}
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define i32 @lshr_exact_cttz_true(i32) {
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; CHECK-LABEL: define i32 @lshr_exact_cttz_true(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTTZ:%.*]] = sub i32 10, [[TMP0]]
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; CHECK-NEXT: ret i32 [[CTTZ]]
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;
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%lshr = lshr exact i32 8387584, %0
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%cttz = call i32 @llvm.cttz.i32(i32 %lshr, i1 true)
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ret i32 %cttz
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}
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define i32 @shl_cttz_true(i32) {
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; CHECK-LABEL: define i32 @shl_cttz_true(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTTZ:%.*]] = add i32 [[TMP0]], 10
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; CHECK-NEXT: ret i32 [[CTTZ]]
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;
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%shl = shl i32 8387584, %0
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%cttz = call i32 @llvm.cttz.i32(i32 %shl, i1 true)
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ret i32 %cttz
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}
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define <2 x i32> @vec2_lshr_ctlz_true(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_lshr_ctlz_true(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = add <2 x i32> [[TMP0]], splat (i32 9)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%div = lshr <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %div, i1 true)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_shl_nuw_ctlz_true(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_nuw_ctlz_true(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = sub <2 x i32> splat (i32 9), [[TMP0]]
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%shl = shl nuw <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_shl_nuw_nsw_ctlz_true(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_nuw_nsw_ctlz_true(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTLZ:%.*]] = sub <2 x i32> splat (i32 9), [[TMP0]]
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%shl = shl nuw nsw <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_lshr_exact_cttz_true(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_lshr_exact_cttz_true(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTTZ:%.*]] = sub <2 x i32> <i32 10, i32 3>, [[TMP0]]
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%lshr = lshr exact <2 x i32> <i32 8387584, i32 4276440>, %0
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %lshr, i1 true)
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ret <2 x i32> %cttz
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}
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define <2 x i32> @vec2_shl_cttz_true(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_cttz_true(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[CTTZ:%.*]] = add <2 x i32> [[TMP0]], <i32 10, i32 3>
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %shl, i1 true)
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ret <2 x i32> %cttz
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}
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; negative tests:
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define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
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; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 1, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 true)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%shl = shl nsw <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_lshr_ctlz_false_neg(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_lshr_ctlz_false_neg(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[DIV:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
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; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[DIV]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%div = lshr <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %div, i1 false)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_shl_ctlz_false_neg(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_ctlz_false_neg(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
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; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 false)
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ret <2 x i32> %ctlz
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}
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define <2 x i32> @vec2_lshr_cttz_false_neg(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_lshr_cttz_false_neg(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
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; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[LSHR]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%lshr = lshr <2 x i32> <i32 8387584, i32 4276440>, %0
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %lshr, i1 false)
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ret <2 x i32> %cttz
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}
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define <2 x i32> @vec2_shl_cttz_false_neg(<2 x i32>) {
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; CHECK-LABEL: define <2 x i32> @vec2_shl_cttz_false_neg(
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; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
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; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 3, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[SHL]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %shl, i1 false)
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ret <2 x i32> %cttz
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}
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define i32 @lshr_ctlz_faslse_neg(i32) {
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; CHECK-LABEL: define i32 @lshr_ctlz_faslse_neg(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]
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; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
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; CHECK-NEXT: ret i32 [[CTLZ]]
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;
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%lshr = lshr i32 8387584, %0
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%ctlz = call i32 @llvm.ctlz.i32(i32 %lshr, i1 false)
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ret i32 %ctlz
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}
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define i32 @shl_ctlz_false_neg(i32) {
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; CHECK-LABEL: define i32 @shl_ctlz_false_neg(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]
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; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SHL]], i1 false)
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; CHECK-NEXT: ret i32 [[CTLZ]]
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;
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%shl = shl i32 8387584, %0
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%ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 false)
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ret i32 %ctlz
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}
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define i32 @lshr_cttz_false_neg(i32) {
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; CHECK-LABEL: define i32 @lshr_cttz_false_neg(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]
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; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[LSHR]], i1 false)
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; CHECK-NEXT: ret i32 [[CTTZ]]
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;
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%lshr = lshr i32 8387584, %0
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%cttz = call i32 @llvm.cttz.i32(i32 %lshr, i1 false)
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ret i32 %cttz
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}
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define i32 @shl_cttz_false_neg(i32) {
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; CHECK-LABEL: define i32 @shl_cttz_false_neg(
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; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]
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; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 10, 33) i32 @llvm.cttz.i32(i32 [[SHL]], i1 false)
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; CHECK-NEXT: ret i32 [[CTTZ]]
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;
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%shl = shl i32 8387584, %0
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%cttz = call i32 @llvm.cttz.i32(i32 %shl, i1 false)
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ret i32 %cttz
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}
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