derek.holloway
7502bf64a4
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401 lines
13 KiB
LLVM
401 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S -passes=instcombine %s | FileCheck %s
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declare void @use(i1)
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define i1 @test_and_olt(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ole(float %x) {
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; CHECK-LABEL: define i1 @test_and_ole(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ole float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ole float %x, 0x3C00000000000000
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%cmp2 = fcmp oge float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_ogt(float %x) {
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; CHECK-LABEL: define i1 @test_or_ogt(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ogt float %x, 0x3C00000000000000
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%cmp2 = fcmp olt float %x, 0xBC00000000000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_oge(float %x) {
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; CHECK-LABEL: define i1 @test_or_oge(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp oge float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp oge float %x, 0x3C00000000000000
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%cmp2 = fcmp ole float %x, 0xBC00000000000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ult(float %x) {
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; CHECK-LABEL: define i1 @test_and_ult(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ult float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ult float %x, 0x3C00000000000000
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%cmp2 = fcmp ugt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ule(float %x) {
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; CHECK-LABEL: define i1 @test_and_ule(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ule float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ule float %x, 0x3C00000000000000
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%cmp2 = fcmp uge float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_ugt(float %x) {
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; CHECK-LABEL: define i1 @test_or_ugt(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ugt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ugt float %x, 0x3C00000000000000
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%cmp2 = fcmp ult float %x, 0xBC00000000000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_uge(float %x) {
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; CHECK-LABEL: define i1 @test_or_uge(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp uge float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp uge float %x, 0x3C00000000000000
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%cmp2 = fcmp ule float %x, 0xBC00000000000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_commuted(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_commuted(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = and i1 %cmp2, %cmp1
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ret i1 %cond
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}
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define i1 @test_and_olt_subnormal(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_subnormal(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 1.401300e-45
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x36A0000000000000
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%cmp2 = fcmp ogt float %x, 0xB6A0000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_infinity(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_infinity(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp one float [[TMP1]], +inf
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x7FF0000000000000
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%cmp2 = fcmp ogt float %x, 0xFFF0000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_zero(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_zero(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 false
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;
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%cmp1 = fcmp olt float %x, 0x0000000000000000
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%cmp2 = fcmp ogt float %x, 0x8000000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ole_zero(float %x) {
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; CHECK-LABEL: define i1 @test_and_ole_zero(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[COND:%.*]] = fcmp oeq float [[X]], 0.000000e+00
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp ole float %x, 0x0000000000000000
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%cmp2 = fcmp oge float %x, 0x8000000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_logical(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_logical(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = select i1 %cmp1, i1 %cmp2, i1 false
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ret i1 %cond
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}
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define <2 x i1> @test_and_olt_poison(<2 x float> %x) {
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; CHECK-LABEL: define <2 x i1> @test_and_olt_poison(
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; CHECK-SAME: <2 x float> [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp olt <2 x float> [[TMP1]], splat (float f0x20000000)
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; CHECK-NEXT: ret <2 x i1> [[COND]]
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;
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%cmp1 = fcmp olt <2 x float> %x, <float 0x3C00000000000000, float poison>
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%cmp2 = fcmp ogt <2 x float> %x, <float 0xBC00000000000000, float poison>
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%cond = and <2 x i1> %cmp1, %cmp2
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ret <2 x i1> %cond
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}
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define i1 @test_and_olt_nan(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_nan(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 false
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;
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%cmp1 = fcmp olt float %x, 0x7FF8000000000000
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%cmp2 = fcmp ogt float %x, 0xFFF8000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ult_nan(float %x) {
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; CHECK-LABEL: define i1 @test_and_ult_nan(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 true
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;
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%cmp1 = fcmp ult float %x, 0x7FF0000020000000
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%cmp2 = fcmp ugt float %x, 0xFFF0000020000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_ogt_nan(float %x) {
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; CHECK-LABEL: define i1 @test_or_ogt_nan(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 false
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;
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%cmp1 = fcmp ogt float %x, 0x7FF0000020000000
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%cmp2 = fcmp olt float %x, 0xFFF0000020000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_ugt_nan(float %x) {
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; CHECK-LABEL: define i1 @test_or_ugt_nan(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 true
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;
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%cmp1 = fcmp ugt float %x, 0x7FF0000020000000
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%cmp2 = fcmp ult float %x, 0xFFF0000020000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_ogt(float %x) {
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; CHECK-LABEL: define i1 @test_and_ogt(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 false
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;
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%cmp1 = fcmp ogt float %x, 0x3C00000000000000
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%cmp2 = fcmp olt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_or_olt(float %x) {
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; CHECK-LABEL: define i1 @test_or_olt(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[TMP1]], f0xA0000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = or i1 %cmp1, %cmp2
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ret i1 %cond
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}
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; Negative tests
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define i1 @test_and_olt_multiuse(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_multiuse(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], f0x20000000
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; CHECK-NEXT: call void @use(i1 [[CMP1]])
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; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[X]], f0xA0000000
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; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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call void @use(i1 %cmp1)
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_mismatched_lhs(float %x, float %y) {
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; CHECK-LABEL: define i1 @test_and_olt_mismatched_lhs(
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; CHECK-SAME: float [[X:%.*]], float [[Y:%.*]]) {
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; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], f0x20000000
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; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[Y]], f0xA0000000
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; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %y, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_same_sign(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_same_sign(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: ret i1 false
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp ogt float %x, 0x3C00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_mismatched_mag(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_mismatched_mag(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], f0x24000000
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; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[X]], f0xA0000000
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; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C80000000000000
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%cmp2 = fcmp ogt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_wrong_pred2(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_wrong_pred2(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], f0x20000000
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; CHECK-NEXT: [[CMP2:%.*]] = fcmp oge float [[X]], f0xA0000000
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; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp olt float %x, 0x3C00000000000000
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%cmp2 = fcmp oge float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_fmf_propagation(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[X]])
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; CHECK-NEXT: [[COND:%.*]] = fcmp nnan ninf nsz olt float [[TMP1]], f0x20000000
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; CHECK-NEXT: ret i1 [[COND]]
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;
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%cmp1 = fcmp nsz nnan ninf olt float %x, 0x3C00000000000000
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%cmp2 = fcmp nsz nnan ninf ogt float %x, 0xBC00000000000000
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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define i1 @test_and_olt_fmf_propagation_union(float %x) {
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; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union(
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; CHECK-SAME: float [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[X]])
|
|
; CHECK-NEXT: [[COND:%.*]] = fcmp nnan ninf nsz olt float [[TMP1]], f0x20000000
|
|
; CHECK-NEXT: ret i1 [[COND]]
|
|
;
|
|
%cmp1 = fcmp nnan ninf olt float %x, 0x3C00000000000000
|
|
%cmp2 = fcmp nsz nnan ogt float %x, 0xBC00000000000000
|
|
%cond = and i1 %cmp1, %cmp2
|
|
ret i1 %cond
|
|
}
|
|
|
|
define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(float %x) {
|
|
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(
|
|
; CHECK-SAME: float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
|
|
; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], f0x20000000
|
|
; CHECK-NEXT: ret i1 [[COND]]
|
|
;
|
|
%cmp1 = fcmp ninf olt float %x, 0x3C00000000000000
|
|
%cmp2 = fcmp ogt float %x, 0xBC00000000000000
|
|
%cond = select i1 %cmp2, i1 %cmp1, i1 false
|
|
ret i1 %cond
|
|
}
|
|
|
|
define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(float %x) {
|
|
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(
|
|
; CHECK-SAME: float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])
|
|
; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], f0x20000000
|
|
; CHECK-NEXT: ret i1 [[COND]]
|
|
;
|
|
%cmp1 = fcmp olt float %x, 0x3C00000000000000
|
|
%cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000
|
|
%cond = select i1 %cmp2, i1 %cmp1, i1 false
|
|
ret i1 %cond
|
|
}
|
|
|
|
define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(float %x) {
|
|
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(
|
|
; CHECK-SAME: float [[X:%.*]]) {
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])
|
|
; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], f0x20000000
|
|
; CHECK-NEXT: ret i1 [[COND]]
|
|
;
|
|
%cmp1 = fcmp ninf olt float %x, 0x3C00000000000000
|
|
%cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000
|
|
%cond = select i1 %cmp2, i1 %cmp1, i1 false
|
|
ret i1 %cond
|
|
}
|