derek.holloway
7502bf64a4
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100 lines
3.3 KiB
LLVM
100 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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;------------------------------------------------------------------------------;
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; Scalar tests
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;------------------------------------------------------------------------------;
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define i1 @umin_scalar(i1 %0, i1 %1) {
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; CHECK-LABEL: define i1 @umin_scalar
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; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP3]]
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;
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%3 = call i1 @llvm.umin.i1(i1 %0, i1 %1)
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ret i1 %3
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}
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define i1 @smin_scalar(i1 %0, i1 %1) {
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; CHECK-LABEL: define i1 @smin_scalar
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; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP3]]
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;
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%3 = call i1 @llvm.smin.i1(i1 %0, i1 %1)
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ret i1 %3
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}
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define i1 @umax_scalar(i1 %0, i1 %1) {
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; CHECK-LABEL: define i1 @umax_scalar
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; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP3]]
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;
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%3 = call i1 @llvm.umax.i1(i1 %0, i1 %1)
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ret i1 %3
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}
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define i1 @smax_scalar(i1 %0, i1 %1) {
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; CHECK-LABEL: define i1 @smax_scalar
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; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP3]]
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;
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%3 = call i1 @llvm.smax.i1(i1 %0, i1 %1)
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ret i1 %3
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}
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;------------------------------------------------------------------------------;
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; Vector tests
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;------------------------------------------------------------------------------;
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define <4 x i1> @umin_vector(<4 x i1> %0, <4 x i1> %1) {
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; CHECK-LABEL: define <4 x i1> @umin_vector
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; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret <4 x i1> [[TMP3]]
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;
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%3 = call <4 x i1> @llvm.umin.v4i1(<4 x i1> %0, <4 x i1> %1)
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ret <4 x i1> %3
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}
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define <4 x i1> @smin_vector(<4 x i1> %0, <4 x i1> %1) {
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; CHECK-LABEL: define <4 x i1> @smin_vector
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; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i1> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret <4 x i1> [[TMP3]]
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;
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%3 = call <4 x i1> @llvm.smin.v4i1(<4 x i1> %0, <4 x i1> %1)
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ret <4 x i1> %3
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}
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define <4 x i1> @umax_vector(<4 x i1> %0, <4 x i1> %1) {
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; CHECK-LABEL: define <4 x i1> @umax_vector
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; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i1> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret <4 x i1> [[TMP3]]
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;
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%3 = call <4 x i1> @llvm.umax.v4i1(<4 x i1> %0, <4 x i1> %1)
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ret <4 x i1> %3
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}
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define <4 x i1> @smax_vector(<4 x i1> %0, <4 x i1> %1) {
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; CHECK-LABEL: define <4 x i1> @smax_vector
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; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
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; CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: ret <4 x i1> [[TMP3]]
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;
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%3 = call <4 x i1> @llvm.smax.v4i1(<4 x i1> %0, <4 x i1> %1)
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ret <4 x i1> %3
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}
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declare i1 @llvm.umin.i1(i1, i1)
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declare i1 @llvm.smin.i1(i1, i1)
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declare i1 @llvm.umax.i1(i1, i1)
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declare i1 @llvm.smax.i1(i1, i1)
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declare <4 x i1> @llvm.umin.v4i1(<4 x i1>, <4 x i1>)
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declare <4 x i1> @llvm.smin.v4i1(<4 x i1>, <4 x i1>)
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declare <4 x i1> @llvm.umax.v4i1(<4 x i1>, <4 x i1>)
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declare <4 x i1> @llvm.smax.v4i1(<4 x i1>, <4 x i1>)
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