derek.holloway
7502bf64a4
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105 lines
3.1 KiB
LLVM
105 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 6
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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define i32 @LHSBin(i1 %C) !prof !0 {
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; CHECK-LABEL: define i32 @LHSBin(
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; CHECK-SAME: i1 [[C:%.*]]) !prof [[PROF0:![0-9]+]] {
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; CHECK-NEXT: [[V:%.*]] = select i1 [[C]], i32 1010, i32 20, !prof [[PROF1:![0-9]+]]
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; CHECK-NEXT: ret i32 [[V]]
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;
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%A = select i1 %C, i32 1000, i32 10, !prof !1
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%V = add i32 %A, 10
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ret i32 %V
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}
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define i32 @RHSBin(i1 %C) !prof !0 {
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; CHECK-LABEL: define i32 @RHSBin(
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; CHECK-SAME: i1 [[C:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[V:%.*]] = select i1 [[C]], i32 1010, i32 20, !prof [[PROF1]]
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; CHECK-NEXT: ret i32 [[V]]
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;
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%A = select i1 %C, i32 1000, i32 10, !prof !1
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%V = add i32 10, %A
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ret i32 %V;
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}
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define i32 @BothBin(i1 %C) !prof !0 {
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; CHECK-LABEL: define i32 @BothBin(
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; CHECK-SAME: i1 [[C:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[V:%.*]] = select i1 [[C]], i32 2000, i32 20, !prof [[PROF1]]
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; CHECK-NEXT: ret i32 [[V]]
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;
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%A = select i1 %C, i32 1000, i32 10, !prof !1
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%B = select i1 %C, i32 1000, i32 10, !prof !1
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%V = add i32 %A, %B
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ret i32 %V;
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}
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define i32 @NegBin(i1 %C) !prof !0 {
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; CHECK-LABEL: define i32 @NegBin(
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; CHECK-SAME: i1 [[C:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[V:%.*]] = select i1 [[C]], i32 1010, i32 0, !prof [[PROF1]]
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; CHECK-NEXT: ret i32 [[V]]
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;
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%A = select i1 %C, i32 1000, i32 -10, !prof !1
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%V = add i32 %A, 10
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ret i32 %V
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}
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define i32 @select_C_minus_1_or_C_from_bool(i1 %x) !prof !0 {
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; CHECK-LABEL: define i32 @select_C_minus_1_or_C_from_bool(
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; CHECK-SAME: i1 [[X:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[ADD:%.*]] = select i1 [[X]], i32 41, i32 42, !prof [[PROF2:![0-9]+]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%ext = sext i1 %x to i32
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%add = add i32 %ext, 42
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ret i32 %add
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}
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define i5 @and_add(i1 %x, i1 %y) !prof !0 {
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; CHECK-LABEL: define i5 @and_add(
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; CHECK-SAME: i1 [[X:%.*]], i1 [[Y:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[X]], true
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[Y]], [[TMP1]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i5 -2, i5 0, !prof [[PROF2]]
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; CHECK-NEXT: ret i5 [[R]]
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;
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%xz = zext i1 %x to i5
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%ys = sext i1 %y to i5
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%sub = add i5 %xz, %ys
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%r = and i5 %sub, 30
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ret i5 %r
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}
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define i32 @add_zext_zext_i1(i1 %a) !prof !0 {
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; CHECK-LABEL: define i32 @add_zext_zext_i1(
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; CHECK-SAME: i1 [[A:%.*]]) !prof [[PROF0]] {
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; CHECK-NEXT: [[ADD:%.*]] = select i1 [[A]], i32 2, i32 0, !prof [[PROF2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%zext = zext i1 %a to i32
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%add = add i32 %zext, %zext
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ret i32 %add
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}
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define i32 @no_count_no_branch_weights(i1 %a) {
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; CHECK-LABEL: define i32 @no_count_no_branch_weights(
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; CHECK-SAME: i1 [[A:%.*]]) {
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; CHECK-NEXT: [[ADD:%.*]] = select i1 [[A]], i32 2, i32 0
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%zext = zext i1 %a to i32
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%add = add i32 %zext, %zext
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ret i32 %add
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}
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!0 = !{!"function_entry_count", i64 1000}
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!1 = !{!"branch_weights", i32 2, i32 3}
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;.
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; CHECK: [[PROF0]] = !{!"function_entry_count", i64 1000}
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; CHECK: [[PROF1]] = !{!"branch_weights", i32 2, i32 3}
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; CHECK: [[PROF2]] = !{!"unknown", !"instcombine"}
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;.
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