derek.holloway
7502bf64a4
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158 lines
6.0 KiB
LLVM
158 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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define i1 @reduce_mul_self(<8 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_self(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[TMP1]], -1
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%res = call i1 @llvm.vector.reduce.mul.v8i32(<8 x i1> %x)
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ret i1 %res
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}
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define i32 @reduce_mul_sext(<4 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_sext(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i4 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%sext = sext <4 x i1> %x to <4 x i32>
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%res = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %sext)
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ret i32 %res
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}
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define i64 @reduce_mul_zext(<8 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i64
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; CHECK-NEXT: ret i64 [[RES]]
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;
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%zext = zext <8 x i1> %x to <8 x i64>
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%res = call i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %zext)
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ret i64 %res
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}
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define i16 @reduce_mul_sext_same(<16 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_sext_same(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i1> [[X:%.*]] to i16
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i16
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; CHECK-NEXT: ret i16 [[RES]]
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;
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%sext = sext <16 x i1> %x to <16 x i16>
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%res = call i16 @llvm.vector.reduce.mul.v16i16(<16 x i16> %sext)
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ret i16 %res
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}
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define i8 @reduce_mul_zext_long(<128 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext_long(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i8
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%sext = sext <128 x i1> %x to <128 x i8>
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%res = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> %sext)
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ret i8 %res
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}
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@glob = external global i8, align 1
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define i8 @reduce_mul_zext_long_external_use(<128 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext_long_external_use(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i8
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <128 x i1> [[X]], i64 0
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; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP3]] to i8
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; CHECK-NEXT: store i8 [[EXT]], ptr @glob, align 1
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%sext = sext <128 x i1> %x to <128 x i8>
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%res = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> %sext)
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%ext = extractelement <128 x i8> %sext, i32 0
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store i8 %ext, ptr @glob, align 1
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ret i8 %res
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}
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@glob1 = external global i64, align 8
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define i64 @reduce_mul_zext_external_use(<8 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext_external_use(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <8 x i1> [[X]], i64 0
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; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP3]] to i64
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; CHECK-NEXT: store i64 [[EXT]], ptr @glob1, align 8
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; CHECK-NEXT: ret i64 [[RES]]
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;
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%zext = zext <8 x i1> %x to <8 x i64>
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%res = call i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %zext)
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%ext = extractelement <8 x i64> %zext, i32 0
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store i64 %ext, ptr @glob1, align 8
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ret i64 %res
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}
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; Can't fold to `zext(reduce.and)`, because, since our input has an odd number
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; of elements, a value of all `true` produces an output of -1, not 1.
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define i8 @reduce_mul_sext_odd_lanes(<3 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_sext_odd_lanes(
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; CHECK-NEXT: [[SEXT:%.*]] = sext <3 x i1> [[X:%.*]] to <3 x i8>
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; CHECK-NEXT: [[RES:%.*]] = call i8 @llvm.vector.reduce.mul.v3i8(<3 x i8> [[SEXT]])
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%sext = sext <3 x i1> %x to <3 x i8>
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%res = call i8 @llvm.vector.reduce.mul.v3i8(<3 x i8> %sext)
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ret i8 %res
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}
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define i8 @reduce_mul_zext_odd_lanes(<3 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext_odd_lanes(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x i1> [[X:%.*]] to i3
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i3 [[TMP1]], -1
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i8
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%zext = zext <3 x i1> %x to <3 x i8>
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%res = call i8 @llvm.vector.reduce.mul.v3i8(<3 x i8> %zext)
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ret i8 %res
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}
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define i32 @reduce_mul_sext_scalable_even(<vscale x 4 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_sext_scalable_even(
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; CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.vector.reduce.and.nxv4i1(<vscale x 4 x i1> [[X:%.*]])
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%sext = sext <vscale x 4 x i1> %x to <vscale x 4 x i32>
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%res = call i32 @llvm.vector.reduce.mul.nxv4i32(<vscale x 4 x i32> %sext)
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ret i32 %res
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}
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; Can't fold to `zext(reduce.and)`, because we don't know if the input has an
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; odd or even number of elements, and this fold is only valid for an even
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; number.
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define i32 @reduce_mul_sext_scalable_unknown_parity(<vscale x 3 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_sext_scalable_unknown_parity(
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; CHECK-NEXT: [[SEXT:%.*]] = sext <vscale x 3 x i1> [[X:%.*]] to <vscale x 3 x i32>
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; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.vector.reduce.mul.nxv3i32(<vscale x 3 x i32> [[SEXT]])
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%sext = sext <vscale x 3 x i1> %x to <vscale x 3 x i32>
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%res = call i32 @llvm.vector.reduce.mul.nxv3i32(<vscale x 3 x i32> %sext)
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ret i32 %res
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}
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define i32 @reduce_mul_zext_scalable(<vscale x 3 x i1> %x) {
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; CHECK-LABEL: @reduce_mul_zext_scalable(
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; CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.vector.reduce.and.nxv3i1(<vscale x 3 x i1> [[X:%.*]])
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; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%zext = zext <vscale x 3 x i1> %x to <vscale x 3 x i32>
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%res = call i32 @llvm.vector.reduce.mul.nxv3i32(<vscale x 3 x i32> %zext)
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ret i32 %res
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}
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