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TheRock/compiler/amd-llvm/llvm/test/Transforms/InstCombine/redundant-fcmp.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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5.5 KiB
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
define i1 @or_fcmp_redundant_or1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or1(
; CHECK-NEXT: [[V2:%.*]] = fcmp olt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_or2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or2(
; CHECK-NEXT: [[V1:%.*]] = fcmp olt double [[V0:%.*]], 2.300000e+00
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp olt double %v0, 2.300000e+00
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_or3(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or3(
; CHECK-NEXT: [[V1:%.*]] = fcmp ogt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_or4(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or4(
; CHECK-NEXT: [[V2:%.*]] = fcmp ogt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp ogt double %v0, 2.300000e+00
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_or_neg1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or_neg1(
; CHECK-NEXT: [[V1:%.*]] = fcmp olt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: [[V2:%.*]] = fcmp ogt double [[V0]], 1.990000e+00
; CHECK-NEXT: [[V3:%.*]] = or i1 [[V1]], [[V2]]
; CHECK-NEXT: ret i1 [[V3]]
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_or_neg2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_or_neg2(
; CHECK-NEXT: [[V1:%.*]] = fcmp ogt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: [[V2:%.*]] = fcmp olt double [[V0]], 1.990000e+00
; CHECK-NEXT: [[V3:%.*]] = or i1 [[V1]], [[V2]]
; CHECK-NEXT: ret i1 [[V3]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = or i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and1(
; CHECK-NEXT: [[V1:%.*]] = fcmp olt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and2(
; CHECK-NEXT: [[V2:%.*]] = fcmp olt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp olt double %v0, 2.300000e+00
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and3(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and3(
; CHECK-NEXT: [[V2:%.*]] = fcmp ogt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and4(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and4(
; CHECK-NEXT: [[V1:%.*]] = fcmp ogt double [[V0:%.*]], 2.300000e+00
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp ogt double %v0, 2.300000e+00
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and_neg1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and_neg1(
; CHECK-NEXT: ret i1 false
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_and_neg2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_and_neg2(
; CHECK-NEXT: [[V1:%.*]] = fcmp ogt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: [[V2:%.*]] = fcmp olt double [[V0]], 1.990000e+00
; CHECK-NEXT: [[V3:%.*]] = and i1 [[V1]], [[V2]]
; CHECK-NEXT: ret i1 [[V3]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = and i1 %v1, %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_select_or1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_select_or1(
; CHECK-NEXT: [[V1:%.*]] = fcmp olt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = select i1 %v1, i1 %v2, i1 false
ret i1 %v3
}
define i1 @or_fcmp_redundant_select_or2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_select_or2(
; CHECK-NEXT: [[V2:%.*]] = fcmp ogt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = select i1 %v1, i1 %v2, i1 false
ret i1 %v3
}
define i1 @or_fcmp_redundant_select_and1(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_select_and1(
; CHECK-NEXT: [[V2:%.*]] = fcmp olt double [[V0:%.*]], 1.990000e+00
; CHECK-NEXT: ret i1 [[V2]]
;
%v1 = fcmp olt double %v0, 1.000000e-02
%v2 = fcmp olt double %v0, 1.990000e+00
%v3 = select i1 %v1, i1 true, i1 %v2
ret i1 %v3
}
define i1 @or_fcmp_redundant_select_and2(double %v0) {
; CHECK-LABEL: @or_fcmp_redundant_select_and2(
; CHECK-NEXT: [[V1:%.*]] = fcmp ogt double [[V0:%.*]], 1.000000e-02
; CHECK-NEXT: ret i1 [[V1]]
;
%v1 = fcmp ogt double %v0, 1.000000e-02
%v2 = fcmp ogt double %v0, 1.990000e+00
%v3 = select i1 %v1, i1 true, i1 %v2
ret i1 %v3
}
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