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TheRock/compiler/amd-llvm/llvm/test/Transforms/LICM/hoist-inaccesiblemem-call.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes='loop-mssa(licm)' < %s -S | FileCheck %s
;; It should hoist fn_write_inaccessible_mem
;; because there is no conflict between inaccessible memory
;; fn_read_inaccessible_mem is a nice side effect
define i32 @loop_alias(i64 %x, ptr %start) {
; CHECK-LABEL: define i32 @loop_alias(
; CHECK-SAME: i64 [[X:%.*]], ptr [[START:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[GEP:%.*]], %[[LOOP]] ]
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PHI]], align 4
; CHECK-NEXT: [[VAL:%.*]] = call i32 @fn_args(i32 [[LOAD]])
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 [[LOAD]])
; CHECK-NEXT: [[GEP]] = getelementptr inbounds nuw i32, ptr [[PHI]], i64 [[X]]
; CHECK-NEXT: [[ACC:%.*]] = add nuw nsw i32 [[VAL]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ACC]], 10
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[AFTER_LOOP:.*]]
; CHECK: [[AFTER_LOOP]]:
; CHECK-NEXT: [[ACC_LCSSA:%.*]] = phi i32 [ [[ACC]], %[[LOOP]] ]
; CHECK-NEXT: ret i32 [[ACC_LCSSA]]
;
entry:
br label %loop
loop:
%phi = phi ptr [ %start, %entry ], [ %gep, %loop ]
%load = load i32, ptr %phi
%val = call i32 @fn_args(i32 %load)
call void @fn_write_inaccessible_mem()
call void @fn_read_inaccessible_mem(i32 %load)
%gep = getelementptr inbounds nuw i32, ptr %phi, i64 %x
%acc = add nuw nsw i32 %val, 1
%cmp = icmp ult i32 %acc, 10
br i1 %cmp, label %loop, label %after_loop
after_loop:
ret i32 %acc
}
;; It should NOT hoist fn_write_inaccessible_mem
;; Because fn_read_inaccessible_mem_2 reads the same inaccessible memory
define i32 @ne_loop_alias(i64 %x, ptr %start) {
; CHECK-LABEL: define i32 @ne_loop_alias(
; CHECK-SAME: i64 [[X:%.*]], ptr [[START:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[GEP:%.*]], %[[LOOP]] ]
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PHI]], align 4
; CHECK-NEXT: [[VAL:%.*]] = call i32 @fn_read_inaccessible_mem_2(i32 [[LOAD]])
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 [[VAL]])
; CHECK-NEXT: [[GEP]] = getelementptr inbounds nuw i32, ptr [[PHI]], i64 [[X]]
; CHECK-NEXT: [[ACC:%.*]] = add nuw nsw i32 [[VAL]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ACC]], 10
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[AFTER_LOOP:.*]]
; CHECK: [[AFTER_LOOP]]:
; CHECK-NEXT: [[ACC_LCSSA:%.*]] = phi i32 [ [[ACC]], %[[LOOP]] ]
; CHECK-NEXT: ret i32 [[ACC_LCSSA]]
;
entry:
br label %loop
loop:
%phi = phi ptr [ %start, %entry ], [ %gep, %loop ]
%load = load i32, ptr %phi
%val = call i32 @fn_read_inaccessible_mem_2(i32 %load)
call void @fn_write_inaccessible_mem()
call void @fn_read_inaccessible_mem(i32 %val)
%gep = getelementptr inbounds nuw i32, ptr %phi, i64 %x
%acc = add nuw nsw i32 %val, 1
%cmp = icmp ult i32 %acc, 10
br i1 %cmp, label %loop, label %after_loop
after_loop:
ret i32 %acc
}
;; Should hoist fn_write_inaccessible_mem
;; It does not alias with store
define void @hoist_untill_I(ptr noalias %loc, ptr noalias %loc2){
; CHECK-LABEL: define void @hoist_untill_I(
; CHECK-SAME: ptr noalias [[LOC:%.*]], ptr noalias [[LOC2:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[LOC2]], align 4
; CHECK-NEXT: store i32 [[VAL]], ptr [[LOC]], align 4
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 [[VAL]])
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
; CHECK: [[FOR_COND_CLEANUP:.*:]]
; CHECK-NEXT: ret void
; CHECK: [[FOR_BODY]]:
; CHECK-NEXT: br label %[[FOR_BODY]]
;
entry:
br label %for.body
for.cond.cleanup: ; preds = %for.body
ret void
for.body:
%val = load i32, ptr %loc2
store i32 %val, ptr %loc
call void @fn_write_inaccessible_mem()
call void @fn_read_inaccessible_mem(i32 %val)
br label %for.body
}
;; Should NOT hoist fn_write_inaccessible_mem
;; because fn_read_inaccessible_mem reads the same memory location
define void @neg_hoist_untill_I(ptr noalias %loc, ptr noalias %loc2){
; CHECK-LABEL: define void @neg_hoist_untill_I(
; CHECK-SAME: ptr noalias [[LOC:%.*]], ptr noalias [[LOC2:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[LOC2]], align 4
; CHECK-NEXT: store i32 [[VAL]], ptr [[LOC]], align 4
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
; CHECK: [[FOR_BODY]]:
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 0)
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 [[VAL]])
; CHECK-NEXT: br label %[[FOR_BODY]]
;
entry:
br label %for.body
for.body:
%val = load i32, ptr %loc2
store i32 %val, ptr %loc
call void @fn_read_inaccessible_mem(i32 0)
call void @fn_write_inaccessible_mem()
call void @fn_read_inaccessible_mem(i32 %val)
br label %for.body
}
;; Nothing should be hoisted from the loop because volatile
;; sets inaccessible memory to read write
define void @neg_volatile(ptr %loc, ptr %loc2) {
; CHECK-LABEL: define void @neg_volatile(
; CHECK-SAME: ptr [[LOC:%.*]], ptr [[LOC2:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[LOC2]], align 4
; CHECK-NEXT: store volatile i32 0, ptr [[LOC]], align 4
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: call void @fn_read_inaccessible_mem(i32 [[VAL]])
; CHECK-NEXT: br label %[[LOOP]]
;
entry:
br label %loop
loop:
%val = load i32, ptr %loc2
store volatile i32 0, ptr %loc
call void @fn_write_inaccessible_mem()
call void @fn_read_inaccessible_mem(i32 %val)
br label %loop
}
define i32 @non_dominated_load_that_does_not_alias_inaccessible_mem(ptr %dst, i64 %x, ptr %start) {
; CHECK-LABEL: define i32 @non_dominated_load_that_does_not_alias_inaccessible_mem(
; CHECK-SAME: ptr [[DST:%.*]], i64 [[X:%.*]], ptr [[START:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: call void @fn_write_inaccessible_mem()
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[GEP:%.*]], %[[LOOP]] ]
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PHI]], align 4
; CHECK-NEXT: [[VAL:%.*]] = call i32 @fn_args(i32 [[LOAD]])
; CHECK-NEXT: [[RES:%.*]] = call i32 @fn_read_inaccessible_mem_2(i32 [[LOAD]])
; CHECK-NEXT: store i32 [[RES]], ptr [[DST]], align 4
; CHECK-NEXT: [[GEP]] = getelementptr inbounds nuw i32, ptr [[PHI]], i64 [[X]]
; CHECK-NEXT: [[ACC:%.*]] = add nuw nsw i32 [[VAL]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ACC]], 10
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[AFTER_LOOP:.*]]
; CHECK: [[AFTER_LOOP]]:
; CHECK-NEXT: [[ACC_LCSSA:%.*]] = phi i32 [ [[ACC]], %[[LOOP]] ]
; CHECK-NEXT: ret i32 [[ACC_LCSSA]]
;
entry:
br label %loop
loop:
%phi = phi ptr [ %start, %entry ], [ %gep, %loop ]
%load = load i32, ptr %phi
%val = call i32 @fn_args(i32 %load)
call void @fn_write_inaccessible_mem()
%res = call i32 @fn_read_inaccessible_mem_2(i32 %load)
store i32 %res, ptr %dst
%gep = getelementptr inbounds nuw i32, ptr %phi, i64 %x
%acc = add nuw nsw i32 %val, 1
%cmp = icmp ult i32 %acc, 10
br i1 %cmp, label %loop, label %after_loop
after_loop:
ret i32 %acc
}
declare i32 @fn_args(i32) nounwind willreturn memory(argmem: read)
declare i32 @fn_read_inaccessible_mem_2(i32) nounwind willreturn memory(inaccessiblemem: read)
declare void @fn_write_inaccessible_mem() nounwind memory(inaccessiblemem: write)
declare void @fn_read_inaccessible_mem(i32) nounwind memory(inaccessiblemem: read)
declare void @fn_readwrite_inaccessible_mem() nounwind memory(inaccessiblemem: readwrite)
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