derek.holloway
7502bf64a4
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54 lines
1.8 KiB
LLVM
54 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -passes=loop-reduce -S %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8"
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define i32 @btc_0(ptr %a0) {
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; CHECK-LABEL: define i32 @btc_0(
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; CHECK-SAME: ptr [[A0:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ 1, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[V1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[V8:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[A0]], align 4
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; CHECK-NEXT: [[V3:%.*]] = add nsw i32 [[V1]], 1
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; CHECK-NEXT: [[V4:%.*]] = srem i32 [[V2]], 3
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; CHECK-NEXT: [[V5:%.*]] = icmp ne i32 [[V4]], 0
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; CHECK-NEXT: [[V6:%.*]] = sub nsw i32 0, [[V2]]
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; CHECK-NEXT: [[V7:%.*]] = select i1 [[V5]], i32 [[V6]], i32 [[V2]]
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; CHECK-NEXT: [[V8]] = mul nsw i32 [[V3]], [[V7]]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nsw i32 [[LSR_IV]], -1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
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; CHECK-NEXT: br i1 [[EC]], label [[B2:%.*]], label [[LOOP]]
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; CHECK: b2:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[V8]], [[LOOP]] ]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
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%v1 = phi i32 [ 0, %entry ], [ %v8, %loop ]
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%v2 = load i32, ptr %a0, align 4
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%v3 = add nsw i32 %v1, 1
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%v4 = srem i32 %v2, 3
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%v5 = icmp ne i32 %v4, 0
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%v6 = sub nsw i32 0, %v2
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%v7 = select i1 %v5, i32 %v6, i32 %v2
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%v8 = mul nsw i32 %v3, %v7
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%iv.next = add nsw i32 %iv, 1
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%ec = icmp eq i32 %iv.next, 1
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br i1 %ec, label %b2, label %loop
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b2:
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%res = phi i32 [ %v8, %loop ]
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br label %exit
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exit:
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ret i32 %res
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}
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