derek.holloway
7502bf64a4
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35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; RUN: opt < %s -passes=debugify,loop-vectorize -force-vector-width=4 -prefer-inloop-reductions -S | FileCheck %s -check-prefix DEBUGLOC
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; Testing the debug locations of the generated vector intstructions are same as
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; their scalar counterpart.
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define i32 @reduction_sum(ptr %A, ptr %B) {
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; DEBUGLOC-LABEL: define i32 @reduction_sum(
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; DEBUGLOC: vector.body:
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; DEBUGLOC: = load <4 x i32>, ptr %{{.+}}, align 4, !dbg ![[LOADLOC:[0-9]+]]
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; DEBUGLOC: = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %{{.+}}), !dbg ![[REDLOC:[0-9]+]]
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; DEBUGLOC: loop:
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; DEBUGLOC: %[[LOAD:.+]] = load i32, ptr %{{.+}}, align 4, !dbg ![[LOADLOC]]
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; DEBUGLOC: = add i32 %{{.+}}, %[[LOAD]], !dbg ![[REDLOC]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%red = phi i32 [ 0, %entry ], [ %red.next, %loop ]
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%gep = getelementptr inbounds i32, ptr %A, i64 %iv
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%load = load i32, ptr %gep, align 4
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%red.next = add i32 %red, %load
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%iv.next = add i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 257
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br i1 %exitcond, label %exit, label %loop
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exit:
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%red.lcssa = phi i32 [ %red.next, %loop ]
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ret i32 %red.lcssa
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}
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; DEBUGLOC: ![[LOADLOC]] = !DILocation(line: 5
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; DEBUGLOC: ![[REDLOC]] = !DILocation(line: 6
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