derek.holloway
7502bf64a4
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165 lines
7.5 KiB
LLVM
165 lines
7.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes='require<domtree>,mergeicmps,verify<domtree>' -mtriple=x86_64-unknown-unknown -S | FileCheck %s --check-prefix=X86
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; RUN: opt < %s -passes=mergeicmps -verify-dom-info -mtriple=x86_64-unknown-unknown -S -disable-simplify-libcalls | FileCheck %s --check-prefix=X86-NOBUILTIN
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%S = type { i32, i32 }
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define zeroext i1 @opeq1(
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; X86-LABEL: @opeq1(
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; X86-NEXT: "entry+land.rhs.i":
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; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(ptr [[A:%.*]], ptr [[B:%.*]], i64 8)
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; X86-NEXT: [[TMP0:%.*]] = icmp eq i32 [[MEMCMP]], 0
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; X86-NEXT: br label [[OPEQ1_EXIT:%.*]]
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; X86: opeq1.exit:
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; X86-NEXT: ret i1 [[TMP0]]
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;
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; X86-NOBUILTIN-LABEL: @opeq1(
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; X86-NOBUILTIN-NEXT: entry:
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; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 4
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; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, ptr [[B:%.*]], align 4
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; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
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; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]]
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; X86-NOBUILTIN: land.rhs.i:
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; X86-NOBUILTIN-NEXT: [[SECOND_I:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A]], i64 0, i32 1
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; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, ptr [[SECOND_I]], align 4
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; X86-NOBUILTIN-NEXT: [[SECOND2_I:%.*]] = getelementptr inbounds [[S]], ptr [[B]], i64 0, i32 1
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; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, ptr [[SECOND2_I]], align 4
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; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
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; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]]
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; X86-NOBUILTIN: opeq1.exit:
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; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
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; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]]
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;
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ptr nocapture readonly dereferenceable(8) %a,
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ptr nocapture readonly dereferenceable(8) %b) local_unnamed_addr nofree nosync {
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entry:
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%0 = load i32, ptr %a, align 4
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%1 = load i32, ptr %b, align 4
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%cmp.i = icmp eq i32 %0, %1
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br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit
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land.rhs.i:
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%second.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1
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%2 = load i32, ptr %second.i, align 4
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%second2.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1
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%3 = load i32, ptr %second2.i, align 4
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%cmp3.i = icmp eq i32 %2, %3
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br label %opeq1.exit
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opeq1.exit:
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%4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
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ret i1 %4
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; The entry block with zero-offset GEPs is kept, loads are removed.
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; The two 4 byte loads and compares are replaced with a single 8-byte memcmp.
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; The branch is now a direct branch; the other block has been removed.
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; The phi is updated.
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}
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; Same as above, but the two blocks are in inverse order.
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define zeroext i1 @opeq1_inverse(
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; X86-LABEL: @opeq1_inverse(
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; X86-NEXT: "land.rhs.i+entry":
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; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(ptr [[A:%.*]], ptr [[B:%.*]], i64 8)
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; X86-NEXT: [[TMP0:%.*]] = icmp eq i32 [[MEMCMP]], 0
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; X86-NEXT: br label [[OPEQ1_EXIT:%.*]]
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; X86: opeq1.exit:
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; X86-NEXT: ret i1 [[TMP0]]
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;
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; X86-NOBUILTIN-LABEL: @opeq1_inverse(
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; X86-NOBUILTIN-NEXT: entry:
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; X86-NOBUILTIN-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A:%.*]], i64 0, i32 1
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; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[FIRST_I]], align 4
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; X86-NOBUILTIN-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds [[S]], ptr [[B:%.*]], i64 0, i32 1
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; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, ptr [[FIRST1_I]], align 4
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; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
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; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]]
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; X86-NOBUILTIN: land.rhs.i:
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; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
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; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, ptr [[B]], align 4
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; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
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; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]]
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; X86-NOBUILTIN: opeq1.exit:
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; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
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; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]]
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;
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ptr nocapture readonly dereferenceable(8) %a,
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ptr nocapture readonly dereferenceable(8) %b) local_unnamed_addr nofree nosync {
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entry:
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%first.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1
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%0 = load i32, ptr %first.i, align 4
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%first1.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1
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%1 = load i32, ptr %first1.i, align 4
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%cmp.i = icmp eq i32 %0, %1
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br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit
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land.rhs.i:
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%2 = load i32, ptr %a, align 4
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%3 = load i32, ptr %b, align 4
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%cmp3.i = icmp eq i32 %2, %3
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br label %opeq1.exit
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opeq1.exit:
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%4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
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ret i1 %4
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; The second block with zero-offset GEPs is kept, loads are removed.
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; CHECK: land.rhs.i
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; The two 4 byte loads and compares are replaced with a single 8-byte memcmp.
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; The branch is now a direct branch; the other block has been removed.
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; The phi is updated.
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}
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; Comparisons whose width is not a byte multiple (here i17) must NOT be merged
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; into a memcmp: the byte-granular length math (SizeBits/8) would truncate and
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; cover fewer bytes than the original chain, dropping high value bits.
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define zeroext i1 @opeq_i17_no_merge(ptr nocapture readonly %a, ptr nocapture readonly %b) {
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; X86-LABEL: @opeq_i17_no_merge(
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; X86-NEXT: entry:
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; X86-NEXT: [[TMP0:%.*]] = load i17, ptr [[A:%.*]], align 4
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; X86-NEXT: [[TMP1:%.*]] = load i17, ptr [[B:%.*]], align 4
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; X86-NEXT: [[CMP_I:%.*]] = icmp eq i17 [[TMP0]], [[TMP1]]
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; X86-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ_EXIT:%.*]]
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; X86: land.rhs.i:
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; X86-NEXT: [[PA:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 2
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; X86-NEXT: [[TMP2:%.*]] = load i17, ptr [[PA]], align 1
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; X86-NEXT: [[PB:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 2
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; X86-NEXT: [[TMP3:%.*]] = load i17, ptr [[PB]], align 1
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; X86-NEXT: [[CMP3_I:%.*]] = icmp eq i17 [[TMP2]], [[TMP3]]
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; X86-NEXT: br label [[OPEQ_EXIT]]
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; X86: opeq.exit:
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; X86-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
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; X86-NEXT: ret i1 [[TMP4]]
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;
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; X86-NOBUILTIN-LABEL: @opeq_i17_no_merge(
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; X86-NOBUILTIN-NEXT: entry:
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; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i17, ptr [[A:%.*]], align 4
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; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i17, ptr [[B:%.*]], align 4
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; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i17 [[TMP0]], [[TMP1]]
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; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ_EXIT:%.*]]
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; X86-NOBUILTIN: land.rhs.i:
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; X86-NOBUILTIN-NEXT: [[PA:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 2
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; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i17, ptr [[PA]], align 1
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; X86-NOBUILTIN-NEXT: [[PB:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 2
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; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i17, ptr [[PB]], align 1
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; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i17 [[TMP2]], [[TMP3]]
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; X86-NOBUILTIN-NEXT: br label [[OPEQ_EXIT]]
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; X86-NOBUILTIN: opeq.exit:
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; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
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; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]]
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;
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entry:
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%0 = load i17, ptr %a, align 4
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%1 = load i17, ptr %b, align 4
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%cmp.i = icmp eq i17 %0, %1
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br i1 %cmp.i, label %land.rhs.i, label %opeq.exit
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land.rhs.i:
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%pa = getelementptr inbounds i8, ptr %a, i64 2
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%2 = load i17, ptr %pa, align 1
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%pb = getelementptr inbounds i8, ptr %b, i64 2
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%3 = load i17, ptr %pb, align 1
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%cmp3.i = icmp eq i17 %2, %3
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br label %opeq.exit
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opeq.exit:
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%4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
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ret i1 %4
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}
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