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66 lines
3.1 KiB
LLVM
66 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer < %s | FileCheck %s
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define i32 @test(i1 %.b, i8 %conv18, i32 %k.promoted61) {
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; CHECK-LABEL: define i32 @test(
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; CHECK-SAME: i1 [[DOTB:%.*]], i8 [[CONV18:%.*]], i32 [[K_PROMOTED61:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i1> poison, i1 [[DOTB]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i1> [[TMP1]], <4 x i1> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP3:%.*]] = xor <4 x i1> [[TMP2]], splat (i1 true)
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <4 x i1> [[TMP3]], zeroinitializer
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; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i1> [[TMP3]] to <4 x i8>
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; CHECK-NEXT: [[TMP7:%.*]] = freeze <4 x i8> [[TMP6]]
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i8> poison, i8 [[CONV18]], i32 0
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; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i8> [[TMP8]], <4 x i8> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt <4 x i8> [[TMP7]], [[TMP9]]
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; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i8> zeroinitializer, <4 x i8> [[TMP7]]
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; CHECK-NEXT: [[TMP12:%.*]] = sub nuw <4 x i8> [[TMP9]], [[TMP11]]
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; CHECK-NEXT: [[TMP13:%.*]] = select <4 x i1> [[TMP5]], <4 x i8> [[TMP9]], <4 x i8> [[TMP12]]
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; CHECK-NEXT: [[TMP14:%.*]] = zext <4 x i8> [[TMP13]] to <4 x i32>
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; CHECK-NEXT: [[TMP15:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP14]])
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; CHECK-NEXT: [[OP_RDX:%.*]] = or i32 [[TMP15]], [[K_PROMOTED61]]
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; CHECK-NEXT: ret i32 [[OP_RDX]]
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;
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%not..b79 = xor i1 %.b, true
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%3 = zext i1 %not..b79 to i8
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%cmp.i51 = icmp eq i8 %3, 0
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%cond.i55 = freeze i8 %3
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%.cmp = icmp ugt i8 %cond.i55, %conv18
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%.urem = select i1 %.cmp, i8 0, i8 %cond.i55
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%4 = sub nuw i8 %conv18, %.urem
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%cond.in.i = select i1 %cmp.i51, i8 %conv18, i8 %4
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%not..b80 = xor i1 %.b, true
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%5 = zext i1 %not..b80 to i8
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%cmp.i51.1 = icmp eq i8 %5, 0
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%cond.i55.1 = freeze i8 %5
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%.cmp.1 = icmp ugt i8 %cond.i55.1, %conv18
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%.urem.1 = select i1 %.cmp.1, i8 0, i8 %cond.i55.1
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%6 = sub nuw i8 %conv18, %.urem.1
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%cond.in.i.1 = select i1 %cmp.i51.1, i8 %conv18, i8 %6
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%not..b81 = xor i1 %.b, true
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%7 = zext i1 %not..b81 to i8
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%cmp.i51.2 = icmp eq i8 %7, 0
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%cond.i55.2 = freeze i8 %7
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%.cmp.2 = icmp ugt i8 %cond.i55.2, %conv18
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%.urem.2 = select i1 %.cmp.2, i8 0, i8 %cond.i55.2
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%8 = sub nuw i8 %conv18, %.urem.2
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%cond.in.i.2 = select i1 %cmp.i51.2, i8 %conv18, i8 %8
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%not..b = xor i1 %.b, true
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%9 = zext i1 %not..b to i8
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%cmp.i51.3 = icmp eq i8 %9, 0
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%cond.i55.3 = freeze i8 %9
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%.cmp.3 = icmp ugt i8 %cond.i55.3, %conv18
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%.urem.3 = select i1 %.cmp.3, i8 0, i8 %cond.i55.3
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%10 = sub nuw i8 %conv18, %.urem.3
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%cond.in.i.3 = select i1 %cmp.i51.3, i8 %conv18, i8 %10
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%conv26 = zext nneg i8 %cond.in.i to i32
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%or = or i32 %k.promoted61, %conv26
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%conv26.1 = zext nneg i8 %cond.in.i.1 to i32
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%or.1 = or i32 %or, %conv26.1
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%conv26.2 = zext nneg i8 %cond.in.i.2 to i32
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%or.2 = or i32 %or.1, %conv26.2
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%conv26.3 = zext nneg i8 %cond.in.i.3 to i32
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%or.3 = or i32 %or.2, %conv26.3
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ret i32 %or.3
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}
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