derek.holloway
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107 lines
3.1 KiB
LLVM
107 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -S -passes="simplifycfg<sink-common-insts>" \
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; RUN: -simplifycfg-require-and-preserve-domtree=1 | FileCheck %s
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define void @callbr_duplicate_dest() {
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; CHECK-LABEL: @callbr_duplicate_dest(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: callbr void asm sideeffect "", "!i"()
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; CHECK-NEXT: to label [[BB:%.*]] [label %bb]
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; CHECK: bb:
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; CHECK-NEXT: ret void
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;
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entry:
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callbr void asm sideeffect "", "!i"()
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to label %bb [label %bb]
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bb:
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ret void
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}
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define void @callbr_can_fold_to_duplicate_dest1() {
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; CHECK-LABEL: @callbr_can_fold_to_duplicate_dest1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: callbr void asm sideeffect "", "!i"()
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; CHECK-NEXT: to label [[COMMON_RET:%.*]] [label %common.ret]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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;
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entry:
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callbr void asm sideeffect "", "!i"()
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to label %bb2 [label %bb1]
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bb1:
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ret void
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bb2:
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ret void
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}
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define void @callbr_can_fold_to_duplicate_dest2() {
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; CHECK-LABEL: @callbr_can_fold_to_duplicate_dest2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: callbr void asm sideeffect "", "!i,!i"()
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; CHECK-NEXT: to label [[COMMON_RET:%.*]] [label [[COMMON_RET]], label %common.ret]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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;
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entry:
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callbr void asm sideeffect "", "!i,!i"()
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to label %bb1 [label %bb2, label %bb3]
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bb1:
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ret void
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bb2:
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ret void
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bb3:
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ret void
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}
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; Validate that callbr landingpad intrinsics do not get merged (via the
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; IntrNoMerge attribute).
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define i32 @callbr_landingpad_nomerge() {
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; CHECK-LABEL: @callbr_landingpad_nomerge(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[OUT:%.*]] = callbr i32 asm "# $0", "=r,!i"()
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; CHECK-NEXT: to label [[DIRECT:%.*]] [label %entry.indirect_crit_edge]
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; CHECK: entry.indirect_crit_edge:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[OUT]])
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: direct:
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; CHECK-NEXT: [[OUT2:%.*]] = callbr i32 asm "# $0", "=r,!i"()
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; CHECK-NEXT: to label [[COMMON_RET]] [label %direct.indirect_crit_edge]
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; CHECK: direct.indirect_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[OUT2]])
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; CHECK-NEXT: br label [[COMMON_RET]]
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; CHECK: common.ret:
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 0, [[DIRECT]] ], [ [[TMP0]], [[ENTRY_INDIRECT_CRIT_EDGE:%.*]] ], [ [[TMP1]], [[DIRECT_INDIRECT_CRIT_EDGE:%.*]] ]
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; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
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;
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entry:
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%out = callbr i32 asm "# $0", "=r,!i"()
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to label %direct [label %entry.indirect_crit_edge]
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entry.indirect_crit_edge:
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%0 = call i32 @llvm.callbr.landingpad.i32(i32 %out)
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br label %indirect
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direct:
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%out2 = callbr i32 asm "# $0", "=r,!i"()
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to label %direct2 [label %direct.indirect_crit_edge]
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direct.indirect_crit_edge:
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%1 = call i32 @llvm.callbr.landingpad.i32(i32 %out2)
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br label %indirect
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direct2:
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ret i32 0
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indirect:
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%out3 = phi i32 [ %0, %entry.indirect_crit_edge ], [ %1, %direct.indirect_crit_edge ]
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ret i32 %out3
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}
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declare i32 @llvm.callbr.landingpad.i32(i32)
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