derek.holloway
7502bf64a4
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163 lines
4.4 KiB
LLVM
163 lines
4.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes='simplifycfg<hoist-common-insts;no-sink-common-insts>' -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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define i1 @common_instr_with_unreachable(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: @common_instr_with_unreachable(
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; CHECK-NEXT: start:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
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; CHECK-NEXT: ret i1 [[TMP0]]
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;
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start:
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switch i64 %a, label %unreachable [
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i64 0, label %bb0
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i64 1, label %bb1
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i64 2, label %bb2
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]
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unreachable:
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unreachable
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bb0: ; preds = %start
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%0 = icmp eq i64 %b, %c
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br label %exit
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bb1: ; preds = %start
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%1 = icmp eq i64 %b, %c
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br label %exit
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bb2: ; preds = %start
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%2 = icmp eq i64 %b, %c
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br label %exit
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exit: ; preds = %bb2, %bb1, %bb0
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%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
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ret i1 %result
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}
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define i1 @common_instr_with_unreachable_2(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: @common_instr_with_unreachable_2(
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; CHECK-NEXT: start:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
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; CHECK-NEXT: ret i1 [[TMP0]]
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;
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start:
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switch i64 %a, label %bb1 [
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i64 0, label %bb0
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i64 1, label %unreachable
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i64 2, label %bb2
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]
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unreachable:
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unreachable
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bb0: ; preds = %start
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%0 = icmp eq i64 %b, %c
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br label %exit
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bb1: ; preds = %start
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%1 = icmp eq i64 %b, %c
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br label %exit
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bb2: ; preds = %start
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%2 = icmp eq i64 %b, %c
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br label %exit
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exit: ; preds = %bb2, %bb1, %bb0
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%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
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ret i1 %result
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}
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define i1 @not_only_unreachable(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: @not_only_unreachable(
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; CHECK-NEXT: start:
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; CHECK-NEXT: switch i64 [[A:%.*]], label [[UNREACHABLE:%.*]] [
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; CHECK-NEXT: i64 0, label [[BB0:%.*]]
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; CHECK-NEXT: i64 1, label [[BB1:%.*]]
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; CHECK-NEXT: i64 2, label [[BB2:%.*]]
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; CHECK-NEXT: ]
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; CHECK: unreachable:
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; CHECK-NEXT: call void @no_return()
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; CHECK-NEXT: unreachable
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
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; CHECK-NEXT: call void @foo()
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: call void @foo()
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb2:
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
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; CHECK-NEXT: call void @foo()
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
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; CHECK-NEXT: ret i1 [[RESULT]]
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;
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start:
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switch i64 %a, label %unreachable [
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i64 0, label %bb0
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i64 1, label %bb1
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i64 2, label %bb2
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]
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unreachable:
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call void @no_return()
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unreachable
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bb0: ; preds = %start
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%0 = icmp eq i64 %b, %c
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call void @foo()
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br label %exit
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bb1: ; preds = %start
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%1 = icmp eq i64 %b, %c
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call void @foo()
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br label %exit
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bb2: ; preds = %start
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%2 = icmp eq i64 %b, %c
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call void @foo()
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br label %exit
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exit: ; preds = %bb2, %bb1, %bb0
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%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
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ret i1 %result
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}
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; If we can hoist a musttail call,
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; we can and have to hoist subsequent bitcast and ret instructions.
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define ptr @switch_musttail_call(ptr %arg) {
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; CHECK-LABEL: @switch_musttail_call(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[P0:%.*]] = musttail call ptr @musttail_call(ptr [[ARG:%.*]])
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; CHECK-NEXT: ret ptr [[P0]]
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;
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bb:
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%load = load i16, ptr %arg, align 2
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switch i16 %load, label %unreachable [
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i16 0, label %bb0
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i16 1, label %bb1
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i16 2, label %bb2
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]
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unreachable:
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unreachable
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bb0:
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%p0 = musttail call ptr @musttail_call(ptr %arg)
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ret ptr %p0
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bb1:
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%p1 = musttail call ptr @musttail_call(ptr %arg)
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ret ptr %p1
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bb2:
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%p2 = musttail call ptr @musttail_call(ptr %arg)
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ret ptr %p2
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}
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declare void @no_return()
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declare void @foo()
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declare ptr @musttail_call(ptr)
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