derek.holloway
7502bf64a4
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85 lines
2.0 KiB
LLVM
85 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
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define i32 @test1(i32 %x) nounwind {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: common.ret:
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; CHECK-NEXT: [[I:%.*]] = shl i32 [[X:%.*]], 1
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I]], 24
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; CHECK-NEXT: [[DOT:%.*]] = select i1 [[COND]], i32 5, i32 0
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; CHECK-NEXT: ret i32 [[DOT]]
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;
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%i = shl i32 %x, 1
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switch i32 %i, label %a [
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i32 21, label %b
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i32 24, label %c
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]
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a:
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ret i32 0
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b:
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ret i32 3
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c:
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ret i32 5
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}
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define i32 @test2(i32 %x) nounwind {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: a:
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; CHECK-NEXT: ret i32 0
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;
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%i = shl i32 %x, 1
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switch i32 %i, label %a [
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i32 21, label %b
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i32 23, label %c
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]
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a:
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ret i32 0
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b:
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ret i32 3
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c:
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ret i32 5
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}
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; We're sign extending an 8-bit value.
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; The switch condition must be in the range [-128, 127], so any cases outside of that range must be dead.
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define i1 @repeated_signbits(i8 %condition) {
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; CHECK-LABEL: @repeated_signbits(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[CONDITION:%.*]] to i32
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; CHECK-NEXT: switch i32 [[SEXT]], label [[DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[COMMON_RET:%.*]]
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; CHECK-NEXT: i32 127, label [[COMMON_RET]]
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; CHECK-NEXT: i32 -128, label [[COMMON_RET]]
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; CHECK-NEXT: i32 -1, label [[COMMON_RET]]
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; CHECK-NEXT: ]
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; CHECK: common.ret:
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i1 [ false, [[DEFAULT]] ], [ true, [[ENTRY:%.*]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ]
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; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
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; CHECK: default:
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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entry:
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%sext = sext i8 %condition to i32
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switch i32 %sext, label %default [
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i32 -2147483648, label %a
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i32 -129, label %a
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i32 -128, label %a
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i32 -1, label %a
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i32 0, label %a
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i32 127, label %a
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i32 128, label %a
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i32 2147483647, label %a
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]
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a:
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ret i1 1
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default:
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ret i1 0
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}
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