CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
272 lines
12 KiB
LLVM
272 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
|
|
; RUN: opt < %s -passes=slsr -S | FileCheck %s
|
|
; RUN: llc < %s -march=nvptx64 -mcpu=sm_75 | FileCheck %s --check-prefix=PTX
|
|
|
|
target triple = "nvptx64-nvidia-cuda"
|
|
|
|
define void @slsr_i8_zero_delta(ptr %in, ptr %out, i64 %add) {
|
|
; PTX-LABEL: slsr_i8_zero_delta(
|
|
; PTX: {
|
|
; PTX-NEXT: .reg .b16 %rs<6>;
|
|
; PTX-NEXT: .reg .b64 %rd<5>;
|
|
; PTX-EMPTY:
|
|
; PTX-NEXT: // %bb.0:
|
|
; PTX-NEXT: ld.param.b64 %rd1, [slsr_i8_zero_delta_param_0];
|
|
; PTX-NEXT: ld.param.b64 %rd2, [slsr_i8_zero_delta_param_2];
|
|
; PTX-NEXT: add.s64 %rd3, %rd1, %rd2;
|
|
; PTX-NEXT: ld.param.b64 %rd4, [slsr_i8_zero_delta_param_1];
|
|
; PTX-NEXT: ld.b8 %rs1, [%rd3+32];
|
|
; PTX-NEXT: ld.b8 %rs2, [%rd3+64];
|
|
; PTX-NEXT: ld.b8 %rs3, [%rd3+96];
|
|
; PTX-NEXT: add.s16 %rs4, %rs1, %rs2;
|
|
; PTX-NEXT: add.s16 %rs5, %rs4, %rs3;
|
|
; PTX-NEXT: st.b8 [%rd4], %rs5;
|
|
; PTX-NEXT: ret;
|
|
; CHECK-LABEL: define void @slsr_i8_zero_delta(
|
|
; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[ADD:%.*]]) {
|
|
; CHECK-NEXT: [[GETELEM0_0:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[GETELEM0_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 32
|
|
; CHECK-NEXT: [[LOAD0:%.*]] = load i8, ptr [[GETELEM0_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM1_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 64
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i8, ptr [[GETELEM1_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM2_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 96
|
|
; CHECK-NEXT: [[LOAD2:%.*]] = load i8, ptr [[GETELEM2_1]], align 1
|
|
; CHECK-NEXT: [[OUT0:%.*]] = add i8 [[LOAD0]], [[LOAD1]]
|
|
; CHECK-NEXT: [[OUT1:%.*]] = add i8 [[OUT0]], [[LOAD2]]
|
|
; CHECK-NEXT: store i8 [[OUT1]], ptr [[OUT]], align 1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%getElem0.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem0.1 = getelementptr inbounds i8, ptr %getElem0.0, i64 32
|
|
%load0 = load i8, ptr %getElem0.1
|
|
|
|
%getElem1.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem1.1 = getelementptr inbounds i8, ptr %getElem1.0, i64 64
|
|
%load1 = load i8, ptr %getElem1.1
|
|
|
|
%getElem2.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem2.1 = getelementptr inbounds i8, ptr %getElem2.0, i64 96
|
|
%load2 = load i8, ptr %getElem2.1
|
|
|
|
%out0 = add i8 %load0, %load1
|
|
%out1 = add i8 %out0, %load2
|
|
store i8 %out1, ptr %out
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @slsr_i8_zero_delta_2(ptr %in, ptr %out, i64 %add) {
|
|
; PTX-LABEL: slsr_i8_zero_delta_2(
|
|
; PTX: {
|
|
; PTX-NEXT: .reg .b16 %rs<6>;
|
|
; PTX-NEXT: .reg .b64 %rd<5>;
|
|
; PTX-EMPTY:
|
|
; PTX-NEXT: // %bb.0:
|
|
; PTX-NEXT: ld.param.b64 %rd1, [slsr_i8_zero_delta_2_param_0];
|
|
; PTX-NEXT: ld.param.b64 %rd2, [slsr_i8_zero_delta_2_param_2];
|
|
; PTX-NEXT: add.s64 %rd3, %rd1, %rd2;
|
|
; PTX-NEXT: ld.param.b64 %rd4, [slsr_i8_zero_delta_2_param_1];
|
|
; PTX-NEXT: ld.b8 %rs1, [%rd3];
|
|
; PTX-NEXT: ld.b8 %rs2, [%rd3+32];
|
|
; PTX-NEXT: ld.b8 %rs3, [%rd3+64];
|
|
; PTX-NEXT: add.s16 %rs4, %rs1, %rs2;
|
|
; PTX-NEXT: add.s16 %rs5, %rs4, %rs3;
|
|
; PTX-NEXT: st.b8 [%rd4], %rs5;
|
|
; PTX-NEXT: ret;
|
|
; CHECK-LABEL: define void @slsr_i8_zero_delta_2(
|
|
; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[ADD:%.*]]) {
|
|
; CHECK-NEXT: [[GETELEM0_0:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[LOAD0:%.*]] = load i8, ptr [[GETELEM0_0]], align 1
|
|
; CHECK-NEXT: [[GETELEM1_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 32
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i8, ptr [[GETELEM1_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM2_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 64
|
|
; CHECK-NEXT: [[LOAD2:%.*]] = load i8, ptr [[GETELEM2_1]], align 1
|
|
; CHECK-NEXT: [[OUT0:%.*]] = add i8 [[LOAD0]], [[LOAD1]]
|
|
; CHECK-NEXT: [[OUT1:%.*]] = add i8 [[OUT0]], [[LOAD2]]
|
|
; CHECK-NEXT: store i8 [[OUT1]], ptr [[OUT]], align 1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%getElem0.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%load0 = load i8, ptr %getElem0.0
|
|
|
|
%getElem1.0 = getelementptr i8, ptr %in, i64 %add
|
|
%getElem1.1 = getelementptr inbounds i8, ptr %getElem1.0, i64 32
|
|
%load1 = load i8, ptr %getElem1.1
|
|
|
|
%getElem2.0 = getelementptr i8, ptr %in, i64 %add
|
|
%getElem2.1 = getelementptr inbounds i8, ptr %getElem2.0, i64 64
|
|
%load2 = load i8, ptr %getElem2.1
|
|
|
|
%out0 = add i8 %load0, %load1
|
|
%out1 = add i8 %out0, %load2
|
|
store i8 %out1, ptr %out
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @slsr_i8_base_delta(ptr %in, ptr %out, i64 %add) {
|
|
; PTX-LABEL: slsr_i8_base_delta(
|
|
; PTX: {
|
|
; PTX-NEXT: .reg .b16 %rs<6>;
|
|
; PTX-NEXT: .reg .b64 %rd<5>;
|
|
; PTX-EMPTY:
|
|
; PTX-NEXT: // %bb.0:
|
|
; PTX-NEXT: ld.param.b64 %rd1, [slsr_i8_base_delta_param_0];
|
|
; PTX-NEXT: ld.param.b64 %rd2, [slsr_i8_base_delta_param_2];
|
|
; PTX-NEXT: add.s64 %rd3, %rd1, %rd2;
|
|
; PTX-NEXT: ld.param.b64 %rd4, [slsr_i8_base_delta_param_1];
|
|
; PTX-NEXT: ld.b8 %rs1, [%rd3+32];
|
|
; PTX-NEXT: ld.b8 %rs2, [%rd3+65];
|
|
; PTX-NEXT: ld.b8 %rs3, [%rd3+98];
|
|
; PTX-NEXT: add.s16 %rs4, %rs1, %rs2;
|
|
; PTX-NEXT: add.s16 %rs5, %rs4, %rs3;
|
|
; PTX-NEXT: st.b8 [%rd4], %rs5;
|
|
; PTX-NEXT: ret;
|
|
; CHECK-LABEL: define void @slsr_i8_base_delta(
|
|
; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[ADD:%.*]]) {
|
|
; CHECK-NEXT: [[GETELEM0_0:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[GETELEM0_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 32
|
|
; CHECK-NEXT: [[LOAD0:%.*]] = load i8, ptr [[GETELEM0_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM1_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 1
|
|
; CHECK-NEXT: [[GETELEM1_2:%.*]] = getelementptr inbounds i8, ptr [[GETELEM1_1]], i64 64
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i8, ptr [[GETELEM1_2]], align 1
|
|
; CHECK-NEXT: [[GETELEM2_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 2
|
|
; CHECK-NEXT: [[GETELEM2_2:%.*]] = getelementptr inbounds i8, ptr [[GETELEM2_1]], i64 96
|
|
; CHECK-NEXT: [[LOAD2:%.*]] = load i8, ptr [[GETELEM2_2]], align 1
|
|
; CHECK-NEXT: [[OUT0:%.*]] = add i8 [[LOAD0]], [[LOAD1]]
|
|
; CHECK-NEXT: [[OUT1:%.*]] = add i8 [[OUT0]], [[LOAD2]]
|
|
; CHECK-NEXT: store i8 [[OUT1]], ptr [[OUT]], align 1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%getElem0.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem0.1 = getelementptr inbounds i8, ptr %getElem0.0, i64 32
|
|
%load0 = load i8, ptr %getElem0.1
|
|
|
|
%getElem1.0 = getelementptr inbounds i8, ptr %in, i64 1
|
|
%getElem1.1 = getelementptr inbounds i8, ptr %getElem1.0, i64 %add
|
|
%getElem1.2 = getelementptr inbounds i8, ptr %getElem1.1, i64 64
|
|
%load1 = load i8, ptr %getElem1.2
|
|
|
|
%getElem2.0 = getelementptr inbounds i8, ptr %in, i64 2
|
|
%getElem2.1 = getelementptr inbounds i8, ptr %getElem2.0, i64 %add
|
|
%getElem2.2 = getelementptr inbounds i8, ptr %getElem2.1, i64 96
|
|
%load2 = load i8, ptr %getElem2.2
|
|
|
|
%out0 = add i8 %load0, %load1
|
|
%out1 = add i8 %out0, %load2
|
|
store i8 %out1, ptr %out
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @slsr_i8_index_delta(ptr %in, ptr %out, i64 %add) {
|
|
; PTX-LABEL: slsr_i8_index_delta(
|
|
; PTX: {
|
|
; PTX-NEXT: .reg .b16 %rs<6>;
|
|
; PTX-NEXT: .reg .b64 %rd<7>;
|
|
; PTX-EMPTY:
|
|
; PTX-NEXT: // %bb.0:
|
|
; PTX-NEXT: ld.param.b64 %rd1, [slsr_i8_index_delta_param_0];
|
|
; PTX-NEXT: ld.param.b64 %rd2, [slsr_i8_index_delta_param_2];
|
|
; PTX-NEXT: shl.b64 %rd3, %rd2, 3;
|
|
; PTX-NEXT: add.s64 %rd4, %rd1, %rd3;
|
|
; PTX-NEXT: ld.param.b64 %rd5, [slsr_i8_index_delta_param_1];
|
|
; PTX-NEXT: ld.b8 %rs1, [%rd4+32];
|
|
; PTX-NEXT: add.s64 %rd6, %rd1, %rd2;
|
|
; PTX-NEXT: ld.b8 %rs2, [%rd6+64];
|
|
; PTX-NEXT: ld.b8 %rs3, [%rd6+96];
|
|
; PTX-NEXT: add.s16 %rs4, %rs1, %rs2;
|
|
; PTX-NEXT: add.s16 %rs5, %rs4, %rs3;
|
|
; PTX-NEXT: st.b8 [%rd5], %rs5;
|
|
; PTX-NEXT: ret;
|
|
; CHECK-LABEL: define void @slsr_i8_index_delta(
|
|
; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[ADD:%.*]]) {
|
|
; CHECK-NEXT: [[GETELEM0_0:%.*]] = getelementptr inbounds double, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[GETELEM0_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 32
|
|
; CHECK-NEXT: [[LOAD0:%.*]] = load i8, ptr [[GETELEM0_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM1_0:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[GETELEM1_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM1_0]], i64 64
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i8, ptr [[GETELEM1_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM2_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM1_0]], i64 96
|
|
; CHECK-NEXT: [[LOAD2:%.*]] = load i8, ptr [[GETELEM2_1]], align 1
|
|
; CHECK-NEXT: [[OUT0:%.*]] = add i8 [[LOAD0]], [[LOAD1]]
|
|
; CHECK-NEXT: [[OUT1:%.*]] = add i8 [[OUT0]], [[LOAD2]]
|
|
; CHECK-NEXT: store i8 [[OUT1]], ptr [[OUT]], align 1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%getElem0.0 = getelementptr inbounds double, ptr %in, i64 %add
|
|
%getElem0.1 = getelementptr inbounds i8, ptr %getElem0.0, i64 32
|
|
%load0 = load i8, ptr %getElem0.1
|
|
|
|
%getElem1.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem1.1 = getelementptr inbounds i8, ptr %getElem1.0, i64 64
|
|
%load1 = load i8, ptr %getElem1.1
|
|
|
|
%getElem2.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem2.1 = getelementptr inbounds i8, ptr %getElem2.0, i64 96
|
|
%load2 = load i8, ptr %getElem2.1
|
|
|
|
%out0 = add i8 %load0, %load1
|
|
%out1 = add i8 %out0, %load2
|
|
store i8 %out1, ptr %out
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @slsr_i8_stride_delta(ptr %in, ptr %out, i64 %add, i64 %offset) {
|
|
; PTX-LABEL: slsr_i8_stride_delta(
|
|
; PTX: {
|
|
; PTX-NEXT: .reg .b16 %rs<6>;
|
|
; PTX-NEXT: .reg .b64 %rd<7>;
|
|
; PTX-EMPTY:
|
|
; PTX-NEXT: // %bb.0:
|
|
; PTX-NEXT: ld.param.b64 %rd1, [slsr_i8_stride_delta_param_0];
|
|
; PTX-NEXT: ld.param.b64 %rd2, [slsr_i8_stride_delta_param_2];
|
|
; PTX-NEXT: add.s64 %rd3, %rd1, %rd2;
|
|
; PTX-NEXT: ld.param.b64 %rd4, [slsr_i8_stride_delta_param_1];
|
|
; PTX-NEXT: ld.b8 %rs1, [%rd3+32];
|
|
; PTX-NEXT: ld.param.b64 %rd5, [slsr_i8_stride_delta_param_3];
|
|
; PTX-NEXT: ld.b8 %rs2, [%rd3+65];
|
|
; PTX-NEXT: add.s64 %rd6, %rd3, %rd5;
|
|
; PTX-NEXT: ld.b8 %rs3, [%rd6+96];
|
|
; PTX-NEXT: add.s16 %rs4, %rs1, %rs2;
|
|
; PTX-NEXT: add.s16 %rs5, %rs4, %rs3;
|
|
; PTX-NEXT: st.b8 [%rd4], %rs5;
|
|
; PTX-NEXT: ret;
|
|
; CHECK-LABEL: define void @slsr_i8_stride_delta(
|
|
; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[ADD:%.*]], i64 [[OFFSET:%.*]]) {
|
|
; CHECK-NEXT: [[GETELEM0_0:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ADD]]
|
|
; CHECK-NEXT: [[GETELEM0_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 32
|
|
; CHECK-NEXT: [[LOAD0:%.*]] = load i8, ptr [[GETELEM0_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM1_0:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 1
|
|
; CHECK-NEXT: [[GETELEM1_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM1_0]], i64 64
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i8, ptr [[GETELEM1_1]], align 1
|
|
; CHECK-NEXT: [[GETELEM2_0:%.*]] = getelementptr inbounds i8, ptr [[GETELEM0_0]], i64 [[OFFSET]]
|
|
; CHECK-NEXT: [[GETELEM2_1:%.*]] = getelementptr inbounds i8, ptr [[GETELEM2_0]], i64 96
|
|
; CHECK-NEXT: [[LOAD2:%.*]] = load i8, ptr [[GETELEM2_1]], align 1
|
|
; CHECK-NEXT: [[OUT0:%.*]] = add i8 [[LOAD0]], [[LOAD1]]
|
|
; CHECK-NEXT: [[OUT1:%.*]] = add i8 [[OUT0]], [[LOAD2]]
|
|
; CHECK-NEXT: store i8 [[OUT1]], ptr [[OUT]], align 1
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%getElem0.0 = getelementptr inbounds i8, ptr %in, i64 %add
|
|
%getElem0.1 = getelementptr inbounds i8, ptr %getElem0.0, i64 32
|
|
%load0 = load i8, ptr %getElem0.1
|
|
|
|
%add1 = add i64 %add, 1
|
|
%getElem1.0 = getelementptr inbounds i8, ptr %in, i64 %add1
|
|
%getElem1.1 = getelementptr inbounds i8, ptr %getElem1.0, i64 64
|
|
%load1 = load i8, ptr %getElem1.1
|
|
|
|
%add2 = add i64 %add, %offset
|
|
%getElem2.0 = getelementptr inbounds i8, ptr %in, i64 %add2
|
|
%getElem2.1 = getelementptr inbounds i8, ptr %getElem2.0, i64 96
|
|
%load2 = load i8, ptr %getElem2.1
|
|
|
|
%out0 = add i8 %load0, %load1
|
|
%out1 = add i8 %out0, %load2
|
|
store i8 %out1, ptr %out
|
|
|
|
ret void
|
|
}
|