derek.holloway
7502bf64a4
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80 lines
4.8 KiB
LLVM
80 lines
4.8 KiB
LLVM
; RUN: not opt -passes=verify -S < %s 2>&1 | FileCheck %s
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; LD2 and LD2LANE
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; CHECK: intrinsic return struct element 0 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld2.v4i32
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define { <4 x i64>, <4 x i32> } @test_ld2_ret(ptr %ptr) {
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%res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)
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ret{ <4 x i64>, <4 x i32> } %res
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}
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declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(ptr %ptr)
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; CHECK: intrinsic return struct element 1 type (matching overload type 0) expected <4 x i64>, but got <4 x i32>
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; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i64
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define { <4 x i64>, <4 x i32> } @test_ld2lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b) {
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%res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64> %a, <4 x i64> %b, i64 0, ptr %ptr)
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ret{ <4 x i64>, <4 x i32> } %res
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}
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declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64>, <4 x i64>, i64, ptr)
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; CHECK: intrinsic argument 0 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i32
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define { <4 x i32>, <4 x i32> } @test_ld2lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b) {
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%res = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64> %a, <4 x i32> %b, i64 0, ptr %ptr)
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ret{ <4 x i32>, <4 x i32> } %res
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}
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declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64>, <4 x i32>, i64, ptr)
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; LD3 and LD3LANE
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; CHECK: intrinsic return struct element 1 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld3.v4i32
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define { <4 x i32>, <4 x i64>, <4 x i32> } @test_ld3_ret(ptr %ptr) {
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%res = call { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)
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ret{ <4 x i32>, <4 x i64>, <4 x i32> } %res
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}
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declare { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(ptr %ptr)
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; CHECK: intrinsic return struct element 1 type (matching overload type 0) expected <4 x i64>, but got <4 x i32>
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; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i64
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define { <4 x i64>, <4 x i32>, <4 x i64> } @test_ld3lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c) {
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%res = call { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, i64 0, ptr %ptr)
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ret{ <4 x i64>, <4 x i32>, <4 x i64> } %res
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}
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declare { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)
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; CHECK: intrinsic argument 0 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i32
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define { <4 x i32>, <4 x i32>, <4 x i32> } @test_ld3lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c) {
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%res = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, i64 0, ptr %ptr)
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ret{ <4 x i32>, <4 x i32>, <4 x i32> } %res
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}
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declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, i64, ptr)
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; LD4 and LD4LANE
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; CHECK: intrinsic return struct element 2 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld4.v4i32
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define { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @test_ld4_ret(ptr %ptr) {
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%res = call { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)
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ret{ <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } %res
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}
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declare { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(ptr %ptr)
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; CHECK: intrinsic return struct element 2 type (matching overload type 0) expected <4 x i64>, but got <4 x i32>
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; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i64
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define { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @test_ld4lane_ret(ptr %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {
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%res = call { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d, i64 0, ptr %ptr)
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ret{ <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } %res
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}
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declare { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>, i64, ptr)
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; CHECK: intrinsic argument 0 type (matching overload type 0) expected <4 x i32>, but got <4 x i64>
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; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i32
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define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_ld4lane_arg(ptr %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
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%res = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, i64 0, ptr %ptr)
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ret{ <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %res
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}
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declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, <4 x i32>, i64, ptr)
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