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43 lines
1.9 KiB
Plaintext
43 lines
1.9 KiB
Plaintext
# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVMUL_VV_MF4_MASK \
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# RUN: --max-configs-per-opcode=1000 --min-instructions=100 | FileCheck %s --check-prefix=FRAC-LMUL
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# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=latency \
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# RUN: --opcode-name=PseudoVFADD_VFPR16_M1_E16,PseudoVFADD_VV_M2_E16,PseudoVFCLASS_V_MF2 --max-configs-per-opcode=1000 --min-instructions=100 | \
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# RUN: FileCheck %s --check-prefix=FP
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# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=inverse_throughput \
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# RUN: --opcode-name=PseudoVSEXT_VF8_M2,PseudoVZEXT_VF8_M2 --max-configs-per-opcode=1000 --min-instructions=100 | \
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# RUN: FileCheck %s --check-prefix=VEXT
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# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p470 -benchmark-phase=assemble-measured-code --mode=latency \
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# RUN: --opcode-name=PseudoVFREDUSUM_VS_M1_E16 --max-configs-per-opcode=1000 --min-instructions=100 | \
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# RUN: FileCheck %s --check-prefix=VFRED --allow-empty
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# UNSUPPORTED: expensive_checks
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# Make sure only the supported SEWs are generated for fractional LMUL.
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# FRAC-LMUL: PseudoVMUL_VV_MF4_MASK
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# FRAC-LMUL: SEW: e8
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# FRAC-LMUL: SEW: e16
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# FRAC-LMUL-NOT: SEW: e{{(32|64)}}
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# Make sure only SEWs that are equal to the supported FLEN are generated
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# FP: PseudoVFADD_VFPR16_M1_E16
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# FP-NOT: SEW: e8
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# FP: PseudoVFADD_VV_M2_E16
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# FP-NOT: SEW: e8
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# FP: PseudoVFCLASS_V_MF2
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# FP-NOT: SEW: e8
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# VS/ZEXT can only operate on SEW that will not lead to invalid EEW on the
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# source operand.
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# VEXT: PseudoVSEXT_VF8_M2
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# VEXT-NOT: SEW: e8
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# VEXT-NOT: SEW: e16
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# VEXT-NOT: SEW: e32
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# VEXT: SEW: e64
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# VEXT: PseudoVZEXT_VF8_M2
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# VEXT-NOT: SEW: e8
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# VEXT-NOT: SEW: e16
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# VEXT-NOT: SEW: e32
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# VEXT: SEW: e64
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# P470 doesn't have Zvfh so 16-bit vfredusum shouldn't exist
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# VFRED-NOT: PseudoVFREDUSUM_VS_M1_E16
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