derek.holloway
7502bf64a4
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6838 lines
765 KiB
ArmAsm
6838 lines
765 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Basic arithmetic operations
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vsetvli x28, x0, e8, mf2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, mf4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, mf8, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, m1, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, m2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, m4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, m8, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, mf2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, mf4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, m1, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, m2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, m4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e16, m8, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e32, mf2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e32, m1, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e32, m2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e32, m4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e32, m8, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e64, m1, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e64, m2, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e64, m4, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e64, m8, tu, mu
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vadd.vi v8, v8, 12
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vsetvli x28, x0, e8, mf2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vadd.vv v8, v8, v8
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|
vsetvli x28, x0, e16, m1, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vadd.vv v8, v8, v8
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|
vsetvli x28, x0, e32, mf2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vadd.vv v8, v8, v8
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|
vsetvli x28, x0, e32, m2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vadd.vv v8, v8, v8
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|
vsetvli x28, x0, e32, m8, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vadd.vv v8, v8, v8
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|
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vsetvli x28, x0, e8, mf2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vadd.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vsub.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vsub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, mf4, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, mf8, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, m1, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, m2, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, m4, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, m8, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e16, mf2, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e16, mf4, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e16, m1, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e16, m2, tu, mu
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vadc.vvm v8, v8, v8, v0
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|
vsetvli x28, x0, e16, m4, tu, mu
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|
vadc.vvm v8, v8, v8, v0
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|
vsetvli x28, x0, e16, m8, tu, mu
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|
vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e32, mf2, tu, mu
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vadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e32, m1, tu, mu
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vadc.vvm v8, v8, v8, v0
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|
vsetvli x28, x0, e32, m2, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
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|
vadc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
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|
vadc.vvm v8, v8, v8, v0
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|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
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|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
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|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf8, tu, mu
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|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m4, tu, mu
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vadc.vxm v8, v8, x30, v0
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vsetvli x28, x0, e32, m8, tu, mu
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vadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
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vadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vadc.vxm v8, v8, x30, v0
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vsetvli x28, x0, e8, mf2, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, mf4, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, mf8, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m1, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m2, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m4, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m8, tu, mu
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, mf4, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m1, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m2, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m4, tu, mu
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vadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m8, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e32, m1, tu, mu
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e32, m2, tu, mu
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vadc.vim v8, v8, 12, v0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vadc.vim v8, v8, 12, v0
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|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vsbc.vvm v8, v8, v8, v0
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|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vsbc.vxm v8, v8, x30, v0
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vwaddu.vv v8, v16, v24
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vwaddu.vv v8, v16, v24
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vwaddu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vwaddu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
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vwaddu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwaddu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vwaddu.vx v8, v16, x30
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vwaddu.vx v8, v16, x30
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwadd.vv v8, v16, v24
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vwadd.vv v8, v16, v24
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
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vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
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vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwadd.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwadd.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsubu.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsubu.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsub.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsub.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vaaddu.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vaaddu.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vaadd.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vaadd.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vasubu.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vasubu.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vasub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vasub.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vasub.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, mf4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, mf8, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, m1, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, m2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, m4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, m8, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, mf2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, mf4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, m1, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, m2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, m4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e16, m8, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e32, mf2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e32, m1, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e32, m2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e32, m4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e32, m8, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e64, m1, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e64, m2, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e64, m4, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e64, m8, tu, mu
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vmadc.vi v8, v8, 12
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vsetvli x28, x0, e8, mf2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, mf4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, mf8, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m1, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, m8, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m1, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e16, m8, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e32, m1, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e32, m2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e32, m4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e32, m8, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e64, m1, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e64, m2, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e64, m4, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e64, m8, tu, mu
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vmadc.vim v8, v8, 12, v0
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vsetvli x28, x0, e8, mf2, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmadc.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmadc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmadc.vv v8, v8, v8
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|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
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vsetvli x28, x0, e8, mf8, tu, mu
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m1, tu, mu
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m2, tu, mu
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m4, tu, mu
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m8, tu, mu
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmadc.vvm v8, v8, v8, v0
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|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmadc.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmadc.vx v8, v8, x30
|
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|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmadc.vxm v8, v8, x30, v0
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vsetvli x28, x0, e64, m4, tu, mu
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vmadc.vxm v8, v8, x30, v0
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vsetvli x28, x0, e64, m8, tu, mu
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vmadc.vxm v8, v8, x30, v0
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmsbc.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmsbc.vv v8, v8, v8
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
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vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsbc.vvm v8, v8, v8, v0
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsbc.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsbc.vxm v8, v8, x30, v0
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrsub.vi v8, v8, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrsub.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vsaddu.vi v8, v8, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vsaddu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vsaddu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vsaddu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m1, tu, mu
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
|
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vsaddu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
|
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vsaddu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vsaddu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vsaddu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vsaddu.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
|
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vsaddu.vx v8, v8, x30
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|
|
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vsetvli x28, x0, e8, mf2, tu, mu
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
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vsadd.vi v8, v8, 12
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vsadd.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
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vsadd.vi v8, v8, 12
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
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vsadd.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
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vsadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vsadd.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
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vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vsadd.vx v8, v8, x30
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
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vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vssubu.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vssubu.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vssub.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vssub.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwaddu.wv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwaddu.wx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwadd.wv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwadd.wx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsubu.wv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsubu.wx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsub.wv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vwsub.wx v8, v16, x30
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VV vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADDU_VX vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VV vaadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAADD_VX vaadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VV vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUBU_VX vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VV vasub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VASUB_VX vasub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VI vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VV vsaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADDU_VX vsaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VI vsadd.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VV vsadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSADD_VX vsadd.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VV vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUBU_VX vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VV vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSSUB_VX vssub.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
|
# CHECK-NEXT: - - 1120.00 - - - - - - 3408.00 - - - - - - -
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vaadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vaadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vasubu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vasubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vasubu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vasubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vasubu.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vim v8, v8, 12, v0
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsaddu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsadd.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssubu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vssub.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
|