derek.holloway
7502bf64a4
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2722 lines
301 KiB
ArmAsm
2722 lines
301 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Comparison operations
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vsetvli x28, x0, e8, mf2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmseq.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vmseq.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, mf4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, mf8, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, m1, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, m2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, m4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, m8, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, mf2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, mf4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, m1, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, m2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, m4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e16, m8, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e32, mf2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e32, m1, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e32, m2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e32, m4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e32, m8, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e64, m1, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e64, m2, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e64, m4, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e64, m8, tu, mu
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vmseq.vi v8, v8, 12
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vsetvli x28, x0, e8, mf2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmsle.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vmsle.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, mf4, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, mf8, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, m1, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, m2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, m4, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e8, m8, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, mf2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, mf4, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, m1, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, m2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, m4, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e16, m8, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e32, mf2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e32, m1, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e32, m2, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e32, m4, tu, mu
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vmsle.vi v8, v8, 12
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|
vsetvli x28, x0, e32, m8, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e64, m1, tu, mu
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vmsle.vi v8, v8, 12
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|
vsetvli x28, x0, e64, m2, tu, mu
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vmsle.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
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vmsle.vi v8, v8, 12
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vsetvli x28, x0, e64, m8, tu, mu
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vmsle.vi v8, v8, 12
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|
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vsetvli x28, x0, e8, mf2, tu, mu
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vmsleu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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|
vmsleu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, mf8, tu, mu
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vmsleu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, m1, tu, mu
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vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
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|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsleu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsleu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
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vmsleu.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmsleu.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmsleu.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmsleu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e16, mf2, tu, mu
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, mf2, tu, mu
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmsleu.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmsleu.vx v8, v8, x30
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e8, m8, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vmsleu.vi v8, v8, 12
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vmsleu.vi v8, v8, 12
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vmsne.vv v8, v8, v8
|
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vsetvli x28, x0, e8, mf4, tu, mu
|
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vmsne.vv v8, v8, v8
|
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vsetvli x28, x0, e8, mf8, tu, mu
|
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vmsne.vv v8, v8, v8
|
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vsetvli x28, x0, e8, m1, tu, mu
|
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vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsne.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsne.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsne.vi v8, v8, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsgtu.vi v8, v8, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsgtu.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
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vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsgt.vi v8, v8, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsgt.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsltu.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsltu.vx v8, v8, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmslt.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmslt.vx v8, v8, x30
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
|
# CHECK-NEXT: - - 440.00 - - - - - - 1320.00 - - - - - - -
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
|
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
|