derek.holloway
7502bf64a4
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1775 lines
194 KiB
ArmAsm
1775 lines
194 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Conversion operations
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vsetvli x28, x0, e16, mf2, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, mf4, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, m1, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, m2, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, m4, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, m8, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e32, mf2, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e32, m1, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e32, m2, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e32, m4, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e32, m8, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vsext.vf2 v8, v16
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vsetvli x28, x0, e16, mf2, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e16, mf4, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e16, m1, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e16, m2, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e16, m4, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e16, m8, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, mf2, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, m1, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, m2, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, m4, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, m8, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vzext.vf2 v8, v16
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vsetvli x28, x0, e32, mf2, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e32, m1, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e32, m2, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e32, m4, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e32, m8, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vsext.vf4 v8, v16
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vsetvli x28, x0, e32, mf2, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e32, m1, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e32, m2, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e32, m4, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e32, m8, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vzext.vf4 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vsext.vf8 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vsext.vf8 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vsext.vf8 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vsext.vf8 v8, v16
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vsetvli x28, x0, e64, m1, tu, mu
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vzext.vf8 v8, v16
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vsetvli x28, x0, e64, m2, tu, mu
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vzext.vf8 v8, v16
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vsetvli x28, x0, e64, m4, tu, mu
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vzext.vf8 v8, v16
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vsetvli x28, x0, e64, m8, tu, mu
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vzext.vf8 v8, v16
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.f.xu.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.f.x.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.rtz.x.f.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.rtz.xu.f.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.x.f.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vfcvt.xu.f.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.f.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.f.xu.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.f.x.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.rod.f.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.rtz.x.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.rtz.xu.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.x.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfncvt.xu.f.w v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.f.f.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.f.x.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.f.xu.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.rtz.x.f.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.rtz.xu.f.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.x.f.v v8, v16
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwcvt.xu.f.v v8, v16
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF4 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF4 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF8 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF8 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF8 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF8 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF8 vzext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF8 vzext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF8 vzext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF8 vzext.vf8 v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_F_X_V vfcvt.f.x.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_X_F_V vfcvt.rtz.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_RTZ_XU_F_V vfcvt.rtz.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_X_F_V vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFCVT_XU_F_V vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_F_W vfncvt.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_XU_W vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_F_X_W vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_ROD_F_F_W vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_RTZ_X_F_W vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_RTZ_XU_F_W vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_X_F_W vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VFMIS[4] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VFMIS[8] VFNCVT_XU_F_W vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VFMIS VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VFMIS VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VFMIS[2] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VFMIS[8] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VFMIS VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VFMIS[2] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VFMIS[8] VFWCVT_F_F_V vfwcvt.f.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_F_X_V vfwcvt.f.x.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_F_XU_V vfwcvt.f.xu.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_RTZ_X_F_V vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_RTZ_XU_F_V vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_X_F_V vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 2.00 3 Andes45VFMIS[2] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 4.00 3 Andes45VFMIS[4] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 8.00 3 Andes45VFMIS[8] VFWCVT_XU_F_V vfwcvt.xu.f.v v8, v16
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
|
# CHECK-NEXT: - - 281.00 - - - - - - - - - 753.00 - - - 188.00
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf4 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf8 v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf8 v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.xu.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.f.x.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.x.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.rtz.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.x.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfcvt.xu.f.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.f.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.xu.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.xu.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.xu.w v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.xu.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.f.x.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rod.f.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rtz.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.rtz.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.x.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfncvt.xu.f.w v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfncvt.xu.f.w v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.f.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.x.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.x.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.x.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.x.v v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.x.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.x.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.x.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.x.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.x.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.f.xu.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.rtz.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.rtz.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.x.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfwcvt.xu.f.v v8, v16
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfwcvt.xu.f.v v8, v16
|