derek.holloway
7502bf64a4
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5617 lines
624 KiB
ArmAsm
5617 lines
624 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Floating point operations
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmfeq.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmfeq.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmfge.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmfge.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmfgt.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmfgt.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmfle.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmfle.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmflt.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmflt.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, m1, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, m2, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, m4, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, m8, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e32, m1, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e32, m2, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e32, m4, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e32, m8, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e64, m1, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e64, m2, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e64, m4, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e64, m8, tu, mu
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vmfne.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmfne.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfadd.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfadd.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m2, tu, mu
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfadd.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfadd.vf v8, v8, ft0
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfsub.vf v8, v8, ft0
|
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|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfclass.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfclass.v v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfclass.v v8, v8
|
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|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
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vfdiv.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfdiv.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfdiv.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfdiv.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfdiv.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
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vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfdiv.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
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vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
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vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
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vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
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vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfdiv.vf v8, v8, ft0
|
|
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmax.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmax.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfmax.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
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vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfmax.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfmax.vf v8, v8, ft0
|
|
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfmin.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfmin.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfmin.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfmin.vv v8, v8, v8
|
|
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfmin.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmin.vf v8, v8, ft0
|
|
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmsac.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmsac.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmsub.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmsub.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmul.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmul.vf v8, v8, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmacc.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmacc.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmadd.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmadd.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmv.f.s f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmv.f.s f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmv.s.f v8, f8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmv.s.f v8, f8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmv.v.f v8, f8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmv.v.f v8, f8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmacc.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmacc.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmadd.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmadd.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmsac.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmsac.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfnmsub.vf v8, f8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfnmsub.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfnmsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfnmsub.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfnmsub.vv v8, v8, v8
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfnmsub.vv v8, v8, v8
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, mf4, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m1, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m4, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e16, m8, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, mf2, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m1, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m2, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m4, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e32, m8, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m1, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m2, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m4, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vfrdiv.vf v8, v8, ft0
|
|
|
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vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
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vfrec7.v v8, v8
|
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vsetvli x28, x0, e16, m2, tu, mu
|
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vfrec7.v v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
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vfrec7.v v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
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vfrec7.v v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfrec7.v v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfrec7.v v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfrsqrt7.v v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfrsub.vf v8, v8, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsqrt.v v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsqrt.v v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnjn.vf v8, v8, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnjn.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnj.vf v8, v8, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnj.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnjx.vf v8, v8, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfsgnjx.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwadd.vf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwadd.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwadd.wf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwadd.wv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwmul.vf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwmul.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwsub.vf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwsub.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwsub.wf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfwsub.wv v8, v16, v24
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VF vmfeq.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFEQ_VV vmfeq.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGE_VF vmfge.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFGT_VF vmfgt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VF vmfle.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLE_VV vmfle.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VF vmflt.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFLT_VV vmflt.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VF vmfne.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VFMIS VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VFMIS[2] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VFMIS[4] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 10 8.00 10 Andes45VFMIS[8] VMFNE_VV vmfne.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VV vfadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFADD_VF vfadd.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VV vfsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFSUB_VF vfsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFCLASS_V vfclass.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 24 44.00 24 Andes45VFDIV[44] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 24 88.00 24 Andes45VFDIV[88] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 24 176.00 24 Andes45VFDIV[176] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 38 72.00 38 Andes45VFDIV[72] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 38 144.00 38 Andes45VFDIV[144] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 38 288.00 38 Andes45VFDIV[288] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 66 64.00 66 Andes45VFDIV[64] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 66 128.00 66 Andes45VFDIV[128] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 66 256.00 66 Andes45VFDIV[256] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 66 512.00 66 Andes45VFDIV[512] VFDIV_VV vfdiv.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 24 44.00 24 Andes45VFDIV[44] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 24 88.00 24 Andes45VFDIV[88] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 24 176.00 24 Andes45VFDIV[176] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 38 72.00 38 Andes45VFDIV[72] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 38 144.00 38 Andes45VFDIV[144] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 38 288.00 38 Andes45VFDIV[288] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 66 64.00 66 Andes45VFDIV[64] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 66 128.00 66 Andes45VFDIV[128] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 66 256.00 66 Andes45VFDIV[256] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 66 512.00 66 Andes45VFDIV[512] VFDIV_VF vfdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VV vfmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMAX_VF vfmax.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VV vfmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMIN_VF vfmin.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VV vfmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSAC_VF vfmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VV vfmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMSUB_VF vfmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VV vfmul.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMUL_VF vfmul.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VF vfmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMACC_VV vfmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VF vfmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFMADD_VV vfmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VFMV_F_S vfmv.f.s fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VFMV_S_F vfmv.s.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMV_V_F vfmv.v.f v8, fs0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VF vfnmacc.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMACC_VV vfnmacc.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VF vfnmadd.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMADD_VV vfnmadd.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VF vfnmsac.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSAC_VV vfnmsac.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VF vfnmsub.vf v8, fs0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFNMSUB_VV vfnmsub.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 24 22.00 24 Andes45VFDIV[22] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 24 44.00 24 Andes45VFDIV[44] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 24 88.00 24 Andes45VFDIV[88] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 24 176.00 24 Andes45VFDIV[176] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 38 36.00 38 Andes45VFDIV[36] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 38 72.00 38 Andes45VFDIV[72] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 38 144.00 38 Andes45VFDIV[144] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 38 288.00 38 Andes45VFDIV[288] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 66 64.00 66 Andes45VFDIV[64] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 66 128.00 66 Andes45VFDIV[128] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 66 256.00 66 Andes45VFDIV[256] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 66 512.00 66 Andes45VFDIV[512] VFRDIV_VF vfrdiv.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFREC7_V vfrec7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 7 1.00 7 Andes45VFDIV VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 7 2.00 7 Andes45VFDIV[2] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 7 4.00 7 Andes45VFDIV[4] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 7 8.00 7 Andes45VFDIV[8] VFRSQRT7_V vfrsqrt7.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFRSUB_VF vfrsub.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 22 20.00 22 Andes45VFDIV[20] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 22 20.00 22 Andes45VFDIV[20] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 22 20.00 22 Andes45VFDIV[20] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 22 40.00 22 Andes45VFDIV[40] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 22 80.00 22 Andes45VFDIV[80] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 22 160.00 22 Andes45VFDIV[160] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 36 34.00 36 Andes45VFDIV[34] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 36 34.00 36 Andes45VFDIV[34] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 36 68.00 36 Andes45VFDIV[68] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 36 136.00 36 Andes45VFDIV[136] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 36 272.00 36 Andes45VFDIV[272] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 64 62.00 64 Andes45VFDIV[62] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 64 124.00 64 Andes45VFDIV[124] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 64 248.00 64 Andes45VFDIV[248] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 64 496.00 64 Andes45VFDIV[496] VFSQRT_V vfsqrt.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VF vfsgnjn.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJN_VV vfneg.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VF vfsgnj.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJ_VV vfsgnj.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VF vfsgnjx.vf v8, v8, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFSGNJX_VV vfabs.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_VF vfwadd.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_VV vfwadd.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_WF vfwadd.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWADD_WV vfwadd.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWMUL_VF vfwmul.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWMUL_VV vfwmul.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_VF vfwsub.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_VV vfwsub.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_WF vfwsub.wf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 6 1.00 6 Andes45VMAC VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 6 2.00 6 Andes45VMAC[2] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 6 4.00 6 Andes45VMAC[4] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 6 8.00 6 Andes45VMAC[8] VFWSUB_WV vfwsub.wv v8, v16, v24
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
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# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
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# CHECK-NEXT: - - 915.00 - - - - - - - - 7640.00 1152.00 - 1414.00 - 30.00
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfeq.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfge.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfgt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfle.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmflt.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmflt.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfne.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vmfne.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfadd.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfsub.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfclass.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 88.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 36.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 288.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 128.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 256.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 512.00 - - - - - vfdiv.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - - - - - - - - - - 36.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 144.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 288.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 64.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 128.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 256.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 512.00 - - - - - vfdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmax.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmin.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmin.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmul.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmacc.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.f.s fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.s.f v8, fs0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfmv.s.f v8, fs0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmacc.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmadd.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmadd.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsac.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vf v8, fs0, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfnmsub.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfrdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfrdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 22.00 - - - - - vfrdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 44.00 - - - - - vfrdiv.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 88.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 176.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 36.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 36.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 72.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 144.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 288.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 64.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 128.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 256.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 512.00 - - - - - vfrdiv.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrec7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 8.00 - - - - - vfrsqrt7.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfrsub.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfrsub.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 20.00 - - - - - vfsqrt.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 20.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 20.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 40.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 80.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 160.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 34.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 34.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 68.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 136.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 272.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 62.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 124.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 248.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 496.00 - - - - - vfsqrt.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjn.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfneg.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vf v8, v8, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnj.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfsgnjx.vf v8, v8, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfabs.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.wf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwadd.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwmul.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwmul.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.vv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.wf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.wv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vfwsub.wv v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vfwsub.wv v8, v16, v24
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