derek.holloway
7502bf64a4
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1882 lines
203 KiB
ArmAsm
1882 lines
203 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Mask operations
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vsetvli x28, x0, e8, mf2, tu, mu
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vmand.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, mf8, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m1, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m4, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m8, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, mf2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, mf4, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m1, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m4, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m8, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e32, mf2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m1, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m4, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m8, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m1, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m2, tu, mu
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|
vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m4, tu, mu
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vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m8, tu, mu
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vmand.mm v8, v8, v8
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|
vsetvli x28, x0, e8, mf2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmnand.mm v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmandn.mm v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmxor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmnor.mm v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m2, tu, mu
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vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m4, tu, mu
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vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e16, m8, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e32, mf2, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m1, tu, mu
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vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m2, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m4, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e32, m8, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m1, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m2, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m4, tu, mu
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|
vmnor.mm v8, v8, v8
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|
vsetvli x28, x0, e64, m8, tu, mu
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|
vmnor.mm v8, v8, v8
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|
|
vsetvli x28, x0, e8, mf2, tu, mu
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|
vmorn.mm v8, v8, v8
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|
vsetvli x28, x0, e8, mf4, tu, mu
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|
vmorn.mm v8, v8, v8
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|
vsetvli x28, x0, e8, mf8, tu, mu
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|
vmorn.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m1, tu, mu
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|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
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|
vmorn.mm v8, v8, v8
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|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmorn.mm v8, v8, v8
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|
vsetvli x28, x0, e16, mf4, tu, mu
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|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmorn.mm v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmxnor.mm v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsbf.m v8, v16
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsbf.m v8, v16
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsif.m v8, v16
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsif.m v8, v16
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmsof.m v8, v16
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmsof.m v8, v16
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vid.v v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vid.v v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vcpop.m x8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vcpop.m x8, v8
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfirst.m x8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfirst.m x8, v8
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMAND_MM vmmv.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNAND_MM vmnot.m v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMANDN_MM vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXOR_MM vmclr.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMOR_MM vmor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMNOR_MM vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMORN_MM vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMXNOR_MM vmset.m v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSBF_M vmsbf.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSIF_M vmsif.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VMSOF_M vmsof.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VID_V vid.v v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VCPOP_M vcpop.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VMASK VFIRST_M vfirst.m s0, v8
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
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# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
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# CHECK-NEXT: [4] - Andes45FMISC
|
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# CHECK-NEXT: [5] - Andes45FMV
|
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# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
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# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
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# CHECK-NEXT: - - 301.00 - - - - - - - - - - - - 345.00 -
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmmv.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnot.m v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmandn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmclr.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmnor.mm v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmorn.mm v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmset.m v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsbf.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsif.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vmsof.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - vid.v v8
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