derek.holloway
7502bf64a4
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1126 lines
121 KiB
ArmAsm
1126 lines
121 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Min/max operations
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vsetvli x28, x0, e8, mf2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmax.vv v8, v8, v8
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|
vsetvli x28, x0, e8, m2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmax.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vmax.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmaxu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e16, m8, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e32, m8, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e64, m1, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e64, m2, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e64, m4, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e64, m8, tu, mu
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vmaxu.vx v8, v8, x30
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vsetvli x28, x0, e8, mf2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmin.vv v8, v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, mf4, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, mf8, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, m1, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, m2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, m4, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e8, m8, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e16, mf2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e16, mf4, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e16, m1, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e16, m2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e16, m4, tu, mu
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vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e16, m8, tu, mu
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|
vmin.vx v8, v8, x30
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vsetvli x28, x0, e32, mf2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e32, m1, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e32, m2, tu, mu
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vmin.vx v8, v8, x30
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vsetvli x28, x0, e32, m4, tu, mu
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vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e32, m8, tu, mu
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|
vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e64, m1, tu, mu
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vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e64, m2, tu, mu
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|
vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e64, m4, tu, mu
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|
vmin.vx v8, v8, x30
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|
vsetvli x28, x0, e64, m8, tu, mu
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|
vmin.vx v8, v8, x30
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|
|
vsetvli x28, x0, e8, mf2, tu, mu
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|
vminu.vv v8, v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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|
vminu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, mf8, tu, mu
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|
vminu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, m1, tu, mu
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|
vminu.vv v8, v8, v8
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|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vminu.vv v8, v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vminu.vx v8, v8, x30
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
|
# CHECK-NEXT: - - 176.00 - - - - - - 528.00 - - - - - - -
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
|