derek.holloway
7502bf64a4
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3522 lines
393 KiB
ArmAsm
3522 lines
393 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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# Permutation and shuffle operations
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv.v.v v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv.v.x v8, x8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, m1, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, m2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, m4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, m8, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, m1, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, m2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, m4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e16, m8, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e32, m1, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e32, m2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e32, m4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e32, m8, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e64, m1, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e64, m2, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e64, m4, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e64, m8, tu, mu
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vmv.v.i v8, 12
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv.x.s x8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv.s.x v8, x8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv1r.v v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, mf8, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, m1, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, m2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, m4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, m8, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, mf2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, mf4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, m1, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, m2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, m4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e16, m8, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e32, mf2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e32, m1, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e32, m2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e32, m4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e32, m8, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e64, m1, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e64, m2, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e64, m4, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e64, m8, tu, mu
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vmv2r.v v8, v8
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vsetvli x28, x0, e8, mf2, tu, mu
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vmv4r.v v8, v8
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vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmv4r.v v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmv4r.v v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmv8r.v v8, v8
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmv8r.v v8, v8
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
viota.m v8, v16
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
viota.m v8, v16
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vcompress.vm v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vslide1up.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vslide1down.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vslideup.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslideup.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
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vslideup.vi v8, v16, 12
|
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vsetvli x28, x0, e64, m8, tu, mu
|
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vslideup.vi v8, v16, 12
|
|
|
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vsetvli x28, x0, e8, mf2, tu, mu
|
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vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
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vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
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vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vslidedown.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vslidedown.vi v8, v16, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrgather.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrgather.vx v8, v16, x30
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrgather.vi v8, v16, 12
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vrgatherei16.vv v8, v16, v24
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmerge.vim v8, v8, 12, v0
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmerge.vvm v8, v8, v8, v0
|
|
|
|
vsetvli x28, x0, e8, mf2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, mf8, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m1, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e8, m8, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vmerge.vxm v8, v8, x30, v0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfmerge.vfm v8, v8, ft0, v0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfslide1down.vf v8, v16, ft0
|
|
|
|
vsetvli x28, x0, e16, mf2, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, mf4, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m1, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m2, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m4, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e16, m8, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, mf2, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m1, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m2, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m4, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e32, m8, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m1, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m2, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m4, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
vsetvli x28, x0, e64, m8, tu, mu
|
|
vfslide1up.vf v8, v16, ft0
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - Andes45ALU:2
|
|
# CHECK-NEXT: [1] - Andes45CSR:1
|
|
# CHECK-NEXT: [2] - Andes45FDIV:1
|
|
# CHECK-NEXT: [3] - Andes45FMAC:1
|
|
# CHECK-NEXT: [4] - Andes45FMISC:1
|
|
# CHECK-NEXT: [5] - Andes45FMV:1
|
|
# CHECK-NEXT: [6] - Andes45LSU:1
|
|
# CHECK-NEXT: [7] - Andes45MDU:1
|
|
# CHECK-NEXT: [8] - Andes45VALU:1
|
|
# CHECK-NEXT: [9] - Andes45VDIV:1
|
|
# CHECK-NEXT: [10] - Andes45VFDIV:1
|
|
# CHECK-NEXT: [11] - Andes45VFMIS:1
|
|
# CHECK-NEXT: [12] - Andes45VLSU:1
|
|
# CHECK-NEXT: [13] - Andes45VMAC:1
|
|
# CHECK-NEXT: [14] - Andes45VMASK:1
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT:1
|
|
|
|
# CHECK: Instruction Info:
|
|
# CHECK-NEXT: [1]: #uOps
|
|
# CHECK-NEXT: [2]: Latency
|
|
# CHECK-NEXT: [3]: RThroughput
|
|
# CHECK-NEXT: [4]: MayLoad
|
|
# CHECK-NEXT: [5]: MayStore
|
|
# CHECK-NEXT: [6]: HasSideEffects (U)
|
|
# CHECK-NEXT: [7]: Bypass Latency
|
|
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
|
|
# CHECK-NEXT: [9]: LLVM Opcode Name
|
|
|
|
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 3 1.00 3 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VMV_S_X vmv.s.x v8, s0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV1R_V vmv1r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV2R_V vmv2r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV4R_V vmv4r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV8R_V vmv8r.v v8, v8
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 1.00 4 Andes45VMASK VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 Andes45VMASK[2] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VMASK[4] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 8.00 4 Andes45VMASK[8] VIOTA_M viota.m v8, v16
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VCOMPRESS_VM vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1UP_VX vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDE1DOWN_VX vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VX vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEUP_VI vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VX vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VSLIDEDOWN_VI vslidedown.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VV vrgather.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VX vrgather.vx v8, v16, t5
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHER_VI vrgather.vi v8, v16, 12
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VFMIS[2] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 4.00 2 Andes45VFMIS[4] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 8.00 2 Andes45VFMIS[8] VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1DOWN_VF vfslide1down.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: 1 4 4.00 4 Andes45VPERMUT[4] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: 1 8 8.00 8 Andes45VPERMUT[8] VFSLIDE1UP_VF vfslide1up.vf v8, v16, ft0
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# CHECK: Resources:
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# CHECK-NEXT: [0.0] - Andes45ALU
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# CHECK-NEXT: [0.1] - Andes45ALU
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# CHECK-NEXT: [1] - Andes45CSR
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# CHECK-NEXT: [2] - Andes45FDIV
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# CHECK-NEXT: [3] - Andes45FMAC
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# CHECK-NEXT: [4] - Andes45FMISC
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# CHECK-NEXT: [5] - Andes45FMV
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# CHECK-NEXT: [6] - Andes45LSU
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# CHECK-NEXT: [7] - Andes45MDU
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# CHECK-NEXT: [8] - Andes45VALU
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# CHECK-NEXT: [9] - Andes45VDIV
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# CHECK-NEXT: [10] - Andes45VFDIV
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# CHECK-NEXT: [11] - Andes45VFMIS
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# CHECK-NEXT: [12] - Andes45VLSU
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# CHECK-NEXT: [13] - Andes45VMAC
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# CHECK-NEXT: [14] - Andes45VMASK
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# CHECK-NEXT: [15] - Andes45VPERMUT
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# CHECK: Resource pressure per iteration:
|
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# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
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# CHECK-NEXT: - - 572.00 - - - - - - 396.00 - - 48.00 - - 66.00 946.00
|
|
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv4r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv8r.v v8, v8
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 - viota.m v8, v16
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 - viota.m v8, v16
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vcompress.vm v8, v16, v24
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1up.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1up.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslide1down.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslideup.vi v8, v16, 12
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vslidedown.vi v8, v16, 12
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vv v8, v16, v24
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vrgather.vx v8, v16, t5
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 2.00 - - - - vfmerge.vfm v8, v8, ft0, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 4.00 - - - - vfmerge.vfm v8, v8, ft0, v0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - 8.00 - - - - vfmerge.vfm v8, v8, ft0, v0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1down.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1down.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vfslide1up.vf v8, v16, ft0
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vfslide1up.vf v8, v16, ft0
|