derek.holloway
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96 lines
7.2 KiB
Plaintext
96 lines
7.2 KiB
Plaintext
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870-d -iterations=1 -instruction-tables=full %p/../Inputs/mul-div.s | FileCheck %s
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ5
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# CHECK-NEXT: [1] - SiFiveP800Div:1
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# CHECK-NEXT: [2] - SiFiveP800FEXQ0:1
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# CHECK-NEXT: [3] - SiFiveP800FEXQ1:1
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# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ1
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# CHECK-NEXT: [5] - SiFiveP800FloatDiv:1
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# CHECK-NEXT: [6] - SiFiveP800IEXQ0:1
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# CHECK-NEXT: [7] - SiFiveP800IEXQ1:1
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# CHECK-NEXT: [8] - SiFiveP800IEXQ2:1
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# CHECK-NEXT: [9] - SiFiveP800IEXQ3:1
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# CHECK-NEXT: [10] - SiFiveP800IEXQ4:1
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# CHECK-NEXT: [11] - SiFiveP800IEXQ5:1
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# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ3
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# CHECK-NEXT: [13] - SiFiveP800LD:1
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# CHECK-NEXT: [14] - SiFiveP800LDST:2
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# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD
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# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ3
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# CHECK-NEXT: [17] - SiFiveP800VDiv:1
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# CHECK-NEXT: [18] - SiFiveP800VEXQ0:1
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# CHECK-NEXT: [19] - SiFiveP800VEXQ1:1
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# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:1
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# CHECK-NEXT: [21] - SiFiveP800VLD:1
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# CHECK-NEXT: [22] - SiFiveP800VST:1
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# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul C_MUL mul a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul MULH mulh a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul MULHU mulhu a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul MULHSU mulhsu a0, a0, a0
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# CHECK-NEXT: 1 2 0.50 2 SiFiveP800IntArith,SiFiveP800Mul MULW mulw a0, a0, a0
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# CHECK-NEXT: 1 35 34.00 35 SiFiveP800Div[34],SiFiveP800IEXQ2,SiFiveP800IntArith DIV div a0, a1, a2
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# CHECK-NEXT: 1 35 34.00 35 SiFiveP800Div[34],SiFiveP800IEXQ2,SiFiveP800IntArith DIVU divu a0, a1, a2
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# CHECK-NEXT: 1 35 34.00 35 SiFiveP800Div[34],SiFiveP800IEXQ2,SiFiveP800IntArith REM rem a0, a1, a2
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# CHECK-NEXT: 1 35 34.00 35 SiFiveP800Div[34],SiFiveP800IEXQ2,SiFiveP800IntArith REMU remu a0, a1, a2
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# CHECK-NEXT: 1 20 19.00 20 SiFiveP800Div[19],SiFiveP800IEXQ2,SiFiveP800IntArith DIVW divw a0, a1, a2
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# CHECK-NEXT: 1 20 19.00 20 SiFiveP800Div[19],SiFiveP800IEXQ2,SiFiveP800IntArith DIVUW divuw a0, a1, a2
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# CHECK-NEXT: 1 20 19.00 20 SiFiveP800Div[19],SiFiveP800IEXQ2,SiFiveP800IntArith REMW remw a0, a1, a2
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# CHECK-NEXT: 1 20 19.00 20 SiFiveP800Div[19],SiFiveP800IEXQ2,SiFiveP800IntArith REMUW remuw a0, a1, a2
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SiFiveP800Div
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# CHECK-NEXT: [1] - SiFiveP800FEXQ0
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# CHECK-NEXT: [2] - SiFiveP800FEXQ1
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# CHECK-NEXT: [3] - SiFiveP800FloatDiv
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# CHECK-NEXT: [4] - SiFiveP800IEXQ0
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# CHECK-NEXT: [5] - SiFiveP800IEXQ1
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# CHECK-NEXT: [6] - SiFiveP800IEXQ2
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# CHECK-NEXT: [7] - SiFiveP800IEXQ3
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# CHECK-NEXT: [8] - SiFiveP800IEXQ4
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# CHECK-NEXT: [9] - SiFiveP800IEXQ5
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# CHECK-NEXT: [10] - SiFiveP800LD
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# CHECK-NEXT: [11.0] - SiFiveP800LDST
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# CHECK-NEXT: [11.1] - SiFiveP800LDST
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# CHECK-NEXT: [12] - SiFiveP800VDiv
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# CHECK-NEXT: [13] - SiFiveP800VEXQ0
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# CHECK-NEXT: [14] - SiFiveP800VEXQ1
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# CHECK-NEXT: [15] - SiFiveP800VFloatDiv
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# CHECK-NEXT: [16] - SiFiveP800VLD
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# CHECK-NEXT: [17] - SiFiveP800VST
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]
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# CHECK-NEXT: 212.00 - - - - 2.50 8.00 2.50 - - - - - - - - - - -
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - mul a0, a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - mulh a0, a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - mulhu a0, a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - mulhsu a0, a0, a0
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# CHECK-NEXT: - - - - - 0.50 - 0.50 - - - - - - - - - - - mulw a0, a0, a0
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# CHECK-NEXT: 34.00 - - - - - 1.00 - - - - - - - - - - - - div a0, a1, a2
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# CHECK-NEXT: 34.00 - - - - - 1.00 - - - - - - - - - - - - divu a0, a1, a2
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# CHECK-NEXT: 34.00 - - - - - 1.00 - - - - - - - - - - - - rem a0, a1, a2
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# CHECK-NEXT: 34.00 - - - - - 1.00 - - - - - - - - - - - - remu a0, a1, a2
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# CHECK-NEXT: 19.00 - - - - - 1.00 - - - - - - - - - - - - divw a0, a1, a2
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# CHECK-NEXT: 19.00 - - - - - 1.00 - - - - - - - - - - - - divuw a0, a1, a2
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# CHECK-NEXT: 19.00 - - - - - 1.00 - - - - - - - - - - - - remw a0, a1, a2
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# CHECK-NEXT: 19.00 - - - - - 1.00 - - - - - - - - - - - - remuw a0, a1, a2
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